Home
last modified time | relevance | path

Searched refs:CONFIG_SAR2_REG (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-mvebu/include/mach/
Dsoc.h139 #define CONFIG_SAR2_REG (MVEBU_REGISTER(0xe8204)) macro
172 #define CONFIG_SAR2_REG (MBUS_DFX_BASE + 0xf8204) macro
188 #define CONFIG_SAR2_REG (MVEBU_REGISTER(0x18234)) macro
/external/u-boot/arch/arm/mach-mvebu/
Dcpu.c162 val = readl(CONFIG_SAR2_REG); /* SAR - Sample At Reset */ in get_sar_freq()
172 freq |= ((readl(CONFIG_SAR2_REG) & SAR2_CPU_FREQ_MASK) in get_sar_freq()
/external/u-boot/scripts/
Dconfig_whitelist.txt1517 CONFIG_SAR2_REG