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Searched refs:DRVCTRL5_IRQ5 (Results 1 – 5 of 5) sorted by relevance

/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/H3/
Dpfc_init_h3_v1.c272 #define DRVCTRL5_IRQ5(x) ((uint32_t)(x) << 28U) macro
930 reg = ((reg & DRVCTRL5_MASK) | DRVCTRL5_IRQ5(7) in pfc_init_h3_v1()
Dpfc_init_h3_v2.c274 #define DRVCTRL5_IRQ5(x) ((uint32_t)(x) << 28U) macro
963 reg = ((reg & DRVCTRL5_MASK) | DRVCTRL5_IRQ5(7) in pfc_init_h3_v2()
/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/M3N/
Dpfc_init_m3n.c276 #define DRVCTRL5_IRQ5(x) ((uint32_t)(x) << 28U) macro
965 reg = ((reg & DRVCTRL5_MASK) | DRVCTRL5_IRQ5(7) in pfc_init_m3n()
/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/M3/
Dpfc_init_m3.c277 #define DRVCTRL5_IRQ5(x) ((uint32_t)(x) << 28U) macro
1058 reg = ((reg & DRVCTRL5_MASK) | DRVCTRL5_IRQ5(7) in pfc_init_m3()
/external/arm-trusted-firmware/drivers/renesas/rcar/pfc/D3/
Dpfc_init_d3.c277 #define DRVCTRL5_IRQ5(x) ((uint32_t)(x) << 28U) macro