Searched refs:NAND_ECC_DIVCKL_RATIO_OFFS (Results 1 – 2 of 2) sorted by relevance
105 #define NAND_ECC_DIVCKL_RATIO_OFFS 6 macro106 #define NAND_ECC_DIVCKL_RATIO_MASK (0xF << NAND_ECC_DIVCKL_RATIO_OFFS)111 #define NAND_ECC_DIVCKL_RATIO_OFFS 6 macro112 #define NAND_ECC_DIVCKL_RATIO_MASK (0xF << NAND_ECC_DIVCKL_RATIO_OFFS)114 #define NAND_ECC_DIVCKL_RATIO_OFFS 8 macro115 #define NAND_ECC_DIVCKL_RATIO_MASK (0x3F << NAND_ECC_DIVCKL_RATIO_OFFS)
510 NAND_ECC_DIVCKL_RATIO_MASK) >> NAND_ECC_DIVCKL_RATIO_OFFS); in mvebu_get_nand_clock()