| /external/u-boot/board/freescale/t208xqds/ |
| D | law.c | 21 #ifdef QIXIS_BASE_PHYS
22 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| D | tlb.c | 129 #ifdef QIXIS_BASE_PHYS
130 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /external/u-boot/board/freescale/t4qds/ |
| D | law.c | 21 #ifdef QIXIS_BASE_PHYS
22 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| D | tlb.c | 123 #ifdef QIXIS_BASE_PHYS
124 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /external/u-boot/board/freescale/t1040qds/ |
| D | law.c | 20 #ifdef QIXIS_BASE_PHYS
21 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| D | tlb.c | 100 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /external/u-boot/board/freescale/t102xqds/ |
| D | law.c | 20 #ifdef QIXIS_BASE_PHYS
21 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| D | tlb.c | 97 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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| /external/u-boot/include/configs/ |
| D | ls1028ardb.h | 32 #define QIXIS_BASE_PHYS QIXIS_BASE macro
52 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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| D | ls1028aqds.h | 27 #define QIXIS_BASE_PHYS QIXIS_BASE macro
47 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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| D | B4860QDS.h | 231 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
233 #define QIXIS_BASE_PHYS QIXIS_BASE macro
246 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| D | T102xQDS.h | 243 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
245 #define QIXIS_BASE_PHYS QIXIS_BASE macro
259 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| D | ls2080a_common.h | 118 #define QIXIS_BASE_PHYS 0x20000000 macro
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| D | ls1043aqds.h | 207 #define QIXIS_BASE_PHYS QIXIS_BASE macro
227 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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| D | T4240QDS.h | 161 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
164 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| D | ls1021aqds.h | 205 #define QIXIS_BASE_PHYS QIXIS_BASE macro
227 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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| D | ls1046aqds.h | 235 #define QIXIS_BASE_PHYS QIXIS_BASE macro
255 #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
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| D | ls1088a_common.h | 120 #define QIXIS_BASE_PHYS 0x20000000 macro
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| D | T1040QDS.h | 181 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
194 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| D | T208xQDS.h | 230 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) macro
233 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| D | ls1088ardb.h | 168 #define SYS_FPGA_CSPR_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| D | ls2080ardb.h | 181 #define CONFIG_SYS_CSPR3_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| D | ls2080aqds.h | 179 #define CONFIG_SYS_CSPR3_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \
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| /external/u-boot/board/freescale/b4860qds/ |
| D | law.c | 18 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| D | tlb.c | 113 SET_TLB_ENTRY(1, QIXIS_BASE, QIXIS_BASE_PHYS,
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