Home
last modified time | relevance | path

Searched refs:acc_wr_control (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/intel/tools/
Di965_asm.h76 unsigned acc_wr_control:1; member
Di965_gram.y295 options.acc_wr_control); in i965_asm_set_instruction_options()
576 options->acc_wr_control = true; in add_instruction_option()
/external/igt-gpu-tools/assembler/
Dbrw_eu_compact.c485 temp.dw0.acc_wr_control = src->header.acc_wr_control; in brw_try_compact_instruction()
573 dst->header.acc_wr_control = src->dw0.acc_wr_control; in brw_uncompact_instruction()
Dgen4asm.h96 unsigned acc_wr_control:1; member
Dbrw_eu.c160 p->current->header.acc_wr_control = value; in brw_set_acc_write_control()
Dbrw_structs.h839 unsigned acc_wr_control:1; member
1477 unsigned acc_wr_control:1; /* 23-23 */ member
Dgen8_instruction.h116 F(acc_wr_control, 28, 28)
Dgram.y614 options->acc_wr_control = BRW_ACCUMULATOR_WRITE_ENABLE; in add_option()
3229 gen8_set_acc_wr_control(GEN8(instr), options.acc_wr_control); in set_instruction_options()
3238 GEN(instr)->header.acc_wr_control = options.acc_wr_control; in set_instruction_options()
Dbrw_disasm.c1336 err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space); in brw_disasm()
/external/mesa3d/src/intel/compiler/
Dbrw_inst.h301 FC(acc_wr_control, /* 4+ */ 28, 28, /* 12+ */ 33, 33, devinfo->gen >= 6)
1393 FC(acc_wr_control, /* 4+ */ 23, 23, /* 12+ */ -1, -1, devinfo->gen >= 6)
Dbrw_eu.cpp295 p->current->acc_wr_control = value; in brw_set_default_acc_write_control()
Dbrw_eu_compact.c1722 compact(acc_wr_control); in try_compact_instruction()
2075 uncompact(acc_wr_control); in uncompact_instruction()
Dbrw_eu.h79 bool acc_wr_control:1; member
Dbrw_eu_emit.c640 brw_inst_set_acc_wr_control(devinfo, insn, state->acc_wr_control); in brw_inst_set_state()