Home
last modified time | relevance | path

Searched refs:bi_dram (Results 1 – 25 of 144) sorted by relevance

123456

/external/u-boot/arch/arm/mach-rockchip/
Dsdram.c43 gd->bd->bi_dram[0].start = 0x200000; in dram_init_banksize()
44 gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; in dram_init_banksize()
53 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
54 gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr in dram_init_banksize()
56 gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr + in dram_init_banksize()
58 gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start in dram_init_banksize()
59 + top - gd->bd->bi_dram[1].start; in dram_init_banksize()
61 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
62 gd->bd->bi_dram[0].size = 0x8400000; in dram_init_banksize()
64 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE in dram_init_banksize()
[all …]
/external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
Dcpu.c527 final_map[index].virt = gd->bd->bi_dram[0].start; in final_mmu_setup()
528 final_map[index].phys = gd->bd->bi_dram[0].start; in final_mmu_setup()
529 final_map[index].size = gd->bd->bi_dram[0].size; in final_mmu_setup()
534 final_map[index].virt = gd->bd->bi_dram[1].start; in final_mmu_setup()
535 final_map[index].phys = gd->bd->bi_dram[1].start; in final_mmu_setup()
536 final_map[index].size = gd->bd->bi_dram[1].size; in final_mmu_setup()
545 final_map[index].virt = gd->bd->bi_dram[2].start; in final_mmu_setup()
546 final_map[index].phys = gd->bd->bi_dram[2].start; in final_mmu_setup()
547 final_map[index].size = gd->bd->bi_dram[2].size; in final_mmu_setup()
1360 gd->bd->bi_dram[i].start = regs.regs[1]; in tfa_dram_init_banksize()
[all …]
/external/u-boot/arch/arm/mach-imx/imx8/
Dcpu.c298 if (gd->bd->bi_dram[current_bank - 1].start > in dram_bank_sort()
299 gd->bd->bi_dram[current_bank].start) { in dram_bank_sort()
300 start = gd->bd->bi_dram[current_bank - 1].start; in dram_bank_sort()
301 size = gd->bd->bi_dram[current_bank - 1].size; in dram_bank_sort()
303 gd->bd->bi_dram[current_bank - 1].start = in dram_bank_sort()
304 gd->bd->bi_dram[current_bank].start; in dram_bank_sort()
305 gd->bd->bi_dram[current_bank - 1].size = in dram_bank_sort()
306 gd->bd->bi_dram[current_bank].size; in dram_bank_sort()
308 gd->bd->bi_dram[current_bank].start = start; in dram_bank_sort()
309 gd->bd->bi_dram[current_bank].size = size; in dram_bank_sort()
[all …]
/external/u-boot/board/freescale/ls2080a/
Dls2080a.c40 print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); in detail_board_ddr_info()
43 if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) { in detail_board_ddr_info()
45 print_size(gd->bd->bi_dram[2].size, ""); in detail_board_ddr_info()
114 base[0] = gd->bd->bi_dram[0].start; in ft_board_setup()
115 size[0] = gd->bd->bi_dram[0].size; in ft_board_setup()
116 base[1] = gd->bd->bi_dram[1].start; in ft_board_setup()
117 size[1] = gd->bd->bi_dram[1].size; in ft_board_setup()
/external/u-boot/board/samsung/smdkv310/
Dsmdkv310.c56 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
57 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, in dram_init_banksize()
59 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize()
60 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, in dram_init_banksize()
62 gd->bd->bi_dram[2].start = PHYS_SDRAM_3; in dram_init_banksize()
63 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, in dram_init_banksize()
65 gd->bd->bi_dram[3].start = PHYS_SDRAM_4; in dram_init_banksize()
66 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, in dram_init_banksize()
/external/u-boot/arch/arm/cpu/arm926ejs/armada100/
Ddram.c80 gd->bd->bi_dram[i].start = armd1_sdram_base(i); in dram_init()
81 gd->bd->bi_dram[i].size = armd1_sdram_size(i); in dram_init()
88 if (gd->bd->bi_dram[i].start != gd->ram_size) in dram_init()
91 gd->ram_size += gd->bd->bi_dram[i].size; in dram_init()
100 gd->bd->bi_dram[i].start = 0; in dram_init()
101 gd->bd->bi_dram[i].size = 0; in dram_init()
/external/u-boot/arch/arm/mach-tegra/
Dboard2.c340 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
341 gd->bd->bi_dram[0].size = usable_ram_size_below_4g(); in dram_init_banksize()
344 gd->pci_ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; in dram_init_banksize()
349 gd->bd->bi_dram[1].start = 0x100000000; in dram_init_banksize()
350 gd->bd->bi_dram[1].size = gd->ram_size - SZ_2G; in dram_init_banksize()
354 gd->bd->bi_dram[1].start = 0; in dram_init_banksize()
355 gd->bd->bi_dram[1].size = 0; in dram_init_banksize()
/external/u-boot/board/hisilicon/hikey/
Dhikey.c462 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
463 gd->bd->bi_dram[0].size = 0x05e00000; in dram_init_banksize()
465 gd->bd->bi_dram[1].start = 0x05f00000; in dram_init_banksize()
466 gd->bd->bi_dram[1].size = 0x00001000; in dram_init_banksize()
468 gd->bd->bi_dram[2].start = 0x05f02000; in dram_init_banksize()
469 gd->bd->bi_dram[2].size = 0x00efd000; in dram_init_banksize()
471 gd->bd->bi_dram[3].start = 0x06e00000; in dram_init_banksize()
472 gd->bd->bi_dram[3].size = 0x0060f000; in dram_init_banksize()
474 gd->bd->bi_dram[4].start = 0x07410000; in dram_init_banksize()
475 gd->bd->bi_dram[4].size = 0x1aaf0000; in dram_init_banksize()
[all …]
/external/u-boot/arch/arm/mach-mvebu/
Darm64-common.c75 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in a8k_dram_init_banksize()
77 gd->bd->bi_dram[0].size = gd->ram_size; in a8k_dram_init_banksize()
81 gd->bd->bi_dram[0].size = max_bank0_size; in a8k_dram_init_banksize()
83 gd->bd->bi_dram[1].start = SZ_4G; in a8k_dram_init_banksize()
84 gd->bd->bi_dram[1].size = gd->ram_size - max_bank0_size; in a8k_dram_init_banksize()
/external/u-boot/arch/arm/mach-imx/mx5/
Dmx53_dram.c37 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
38 gd->bd->bi_dram[0].size = get_ram_size((void *)PHYS_SDRAM_1, 1 << 30); in dram_init_banksize()
40 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize()
41 gd->bd->bi_dram[1].size = get_ram_size((void *)PHYS_SDRAM_2, 1 << 30); in dram_init_banksize()
/external/u-boot/board/broadcom/bcmns2/
Dnorthstar2.c47 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
48 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
50 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_1_SIZE; in dram_init_banksize()
51 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; in dram_init_banksize()
/external/u-boot/board/ti/j721e/
Devm.c48 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
49 gd->bd->bi_dram[0].size = 0x80000000; in dram_init_banksize()
54 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1; in dram_init_banksize()
55 gd->bd->bi_dram[1].size = 0x80000000; in dram_init_banksize()
/external/u-boot/arch/arm/mach-uniphier/
Dfdt-fixup.c31 for (i = 0; i < ARRAY_SIZE(bd->bi_dram); i++) { in uniphier_ld20_fdt_mem_rsv()
32 if (!bd->bi_dram[i].size) in uniphier_ld20_fdt_mem_rsv()
35 rsv_addr = bd->bi_dram[i].start + bd->bi_dram[i].size; in uniphier_ld20_fdt_mem_rsv()
/external/u-boot/board/samsung/goni/
Dgoni.c57 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
58 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
59 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize()
60 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; in dram_init_banksize()
61 gd->bd->bi_dram[2].start = PHYS_SDRAM_3; in dram_init_banksize()
62 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; in dram_init_banksize()
/external/u-boot/board/freescale/ls1028a/
Dls1028a.c121 print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); in detail_board_ddr_info()
134 base[0] = gd->bd->bi_dram[0].start; in ft_board_setup()
135 size[0] = gd->bd->bi_dram[0].size; in ft_board_setup()
136 base[1] = gd->bd->bi_dram[1].start; in ft_board_setup()
137 size[1] = gd->bd->bi_dram[1].size; in ft_board_setup()
/external/u-boot/common/init/
Dhandoff.c22 ho->ram_bank[i].start = bd->bi_dram[i].start; in handoff_save_dram()
23 ho->ram_bank[i].size = bd->bi_dram[i].size; in handoff_save_dram()
42 bd->bi_dram[i].start = ho->ram_bank[i].start; in handoff_load_dram_banks()
43 bd->bi_dram[i].size = ho->ram_bank[i].size; in handoff_load_dram_banks()
/external/u-boot/board/freescale/ls2080aqds/
Dls2080aqds.c281 print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); in detail_board_ddr_info()
284 if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) { in detail_board_ddr_info()
286 print_size(gd->bd->bi_dram[2].size, ""); in detail_board_ddr_info()
337 base[0] = gd->bd->bi_dram[0].start; in ft_board_setup()
338 size[0] = gd->bd->bi_dram[0].size; in ft_board_setup()
339 base[1] = gd->bd->bi_dram[1].start; in ft_board_setup()
340 size[1] = gd->bd->bi_dram[1].size; in ft_board_setup()
/external/u-boot/board/AndesTech/adp-ae3xx/
Dadp-ae3xx.c50 gd->bd->bi_dram[0].start = PHYS_SDRAM_0; in dram_init_banksize()
51 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; in dram_init_banksize()
52 gd->bd->bi_dram[1].start = PHYS_SDRAM_1; in dram_init_banksize()
53 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
/external/u-boot/board/AndesTech/adp-ag101p/
Dadp-ag101p.c57 gd->bd->bi_dram[0].start = PHYS_SDRAM_0; in dram_init_banksize()
58 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; in dram_init_banksize()
59 gd->bd->bi_dram[1].start = PHYS_SDRAM_1; in dram_init_banksize()
60 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
/external/u-boot/board/armltd/vexpress64/
Dvexpress64.c74 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
75 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize()
77 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize()
78 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; in dram_init_banksize()
/external/u-boot/arch/x86/cpu/qemu/
Ddram.c53 gd->bd->bi_dram[0].start = 0; in dram_init_banksize()
54 gd->bd->bi_dram[0].size = qemu_get_low_memory_size(); in dram_init_banksize()
58 gd->bd->bi_dram[1].start = SZ_4G; in dram_init_banksize()
59 gd->bd->bi_dram[1].size = high_mem_size; in dram_init_banksize()
/external/u-boot/board/compulab/cm_fx6/
Dcm_fx6.c661 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize()
662 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize()
666 gd->bd->bi_dram[0].size = 0x10000000; in dram_init_banksize()
667 gd->bd->bi_dram[1].size = 0; in dram_init_banksize()
670 gd->bd->bi_dram[0].size = 0x20000000; in dram_init_banksize()
671 gd->bd->bi_dram[1].size = 0; in dram_init_banksize()
675 gd->bd->bi_dram[0].size = 0x20000000; in dram_init_banksize()
676 gd->bd->bi_dram[1].size = 0x20000000; in dram_init_banksize()
678 gd->bd->bi_dram[0].size = 0x40000000; in dram_init_banksize()
679 gd->bd->bi_dram[1].size = 0; in dram_init_banksize()
[all …]
/external/u-boot/board/renesas/rcar-common/
Dcommon.c73 if (bd->bi_dram[i].size) { in ft_board_setup()
75 bd->bi_dram[i].start, in ft_board_setup()
76 bd->bi_dram[i].start, in ft_board_setup()
77 bd->bi_dram[i].size, in ft_board_setup()
/external/u-boot/arch/arm/mach-versal/
Dcpu.c81 if (!gd->bd->bi_dram[i].size) in mem_map_fill()
84 versal_mem_map[banks].virt = gd->bd->bi_dram[i].start; in mem_map_fill()
85 versal_mem_map[banks].phys = gd->bd->bi_dram[i].start; in mem_map_fill()
86 versal_mem_map[banks].size = gd->bd->bi_dram[i].size; in mem_map_fill()
/external/u-boot/board/freescale/ls2080ardb/
Dls2080ardb.c310 print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); in detail_board_ddr_info()
313 if (soc_has_dp_ddr() && gd->bd->bi_dram[2].size) { in detail_board_ddr_info()
315 print_size(gd->bd->bi_dram[2].size, ""); in detail_board_ddr_info()
445 base[0] = gd->bd->bi_dram[0].start; in ft_board_setup()
446 size[0] = gd->bd->bi_dram[0].size; in ft_board_setup()
447 base[1] = gd->bd->bi_dram[1].start; in ft_board_setup()
448 size[1] = gd->bd->bi_dram[1].size; in ft_board_setup()

123456