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Searched refs:ddr3 (Results 1 – 25 of 30) sorted by relevance

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/external/u-boot/board/siemens/draco/
Dboard.c77 settings.ddr3 = ddr3_default; in set_default_ddr3_timings()
84 printf("device:\t\t%s\n", settings.ddr3.manu_name); in print_ddr3_timings()
85 printf("marking:\t%s\n", settings.ddr3.manu_marking); in print_ddr3_timings()
168 (uchar *)&settings.ddr3, sizeof(struct ddr3_data))) { in read_eeprom()
177 if (ddr3_default.magic == settings.ddr3.magic && in read_eeprom()
178 ddr3_default.version == settings.ddr3.version) { in read_eeprom()
181 if (ddr3_default.magic != settings.ddr3.magic) in read_eeprom()
183 if (ddr3_default.version != settings.ddr3.version) in read_eeprom()
219 draco_ddr3_emif_reg_data.sdram_tim1 = settings.ddr3.sdram_tim1; in board_init_ddr()
220 draco_ddr3_emif_reg_data.sdram_tim2 = settings.ddr3.sdram_tim2; in board_init_ddr()
[all …]
Dboard.h19 settings.ddr3.x, /* EEPROM Value */ \
21 settings.ddr3.x-ddr3_default.x /* Difference */
57 struct ddr3_data ddr3; member
/external/u-boot/drivers/ram/mediatek/
DMakefile7 obj-$(CONFIG_TARGET_MT7629) = ddr3-mt7629.o
/external/u-boot/cmd/ti/
DMakefile7 obj-$(CONFIG_CMD_DDR3) += ddr3.o
DKconfig6 Support for testing ddr3 on TI platforms. This command
/external/u-boot/arch/arm/dts/
Drk3399-nanopi-neo4-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1866.dtsi"
Drk3399-puma-ddr1866.dts9 #include "rk3399-sdram-ddr3-1866.dtsi"
Drk3399-orangepi-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1333.dtsi"
Drk3399-puma-ddr1333.dts9 #include "rk3399-sdram-ddr3-1333.dtsi"
Drk3328-evb-u-boot.dtsi7 #include "rk3328-sdram-ddr3-666.dtsi"
Drk3399-ficus-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1600.dtsi"
Drk3399-puma-ddr1600.dts10 #include "rk3399-sdram-ddr3-1600.dtsi"
Drk3399-firefly-u-boot.dtsi7 #include "rk3399-sdram-ddr3-1600.dtsi"
Dstm32mp157a-avenger96-u-boot.dtsi11 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
Dstm32mp157c-ed1-u-boot.dtsi8 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
Dexynos5420-smdk5420.dts150 mem-type = "ddr3";
Dstm32mp157a-dk1-u-boot.dtsi8 #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
Dexynos54xx.dtsi210 mem-type = "ddr3";
Dexynos5800-peach-pi.dts55 mem-type = "ddr3";
Dsun50i-a64-teres-i.dts189 regulator-name = "vcc-ddr3";
/external/u-boot/arch/arm/mach-keystone/
DMakefile18 obj-y += ddr3.o
/external/u-boot/board/hisilicon/hikey/
DREADME124 INFO: ddr3 rank1 init pass
126 INFO: ddr3 rank1 init pass
128 INFO: ddr3 rank1 init pass
130 INFO: ddr3 rank1 init pass
132 INFO: ddr3 rank1 init pass
/external/arm-trusted-firmware/fdts/
Dstm32mp157a-avenger96.dts175 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
Dstm32mp157a-dk1.dts195 #include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
Dstm32mp157c-ed1.dts199 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"

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