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Searched refs:idr (Results 1 – 25 of 66) sorted by relevance

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/external/u-boot/drivers/gpio/
Dat91_gpio.c78 writel(mask, &at91_port->idr); in at91_set_pio_periph()
96 writel(mask, &at91_port->idr); in at91_set_a_periph()
115 writel(mask, &at91_port->idr); in at91_set_b_periph()
134 writel(mask, &at91_port->idr); in at91_pio3_set_a_periph()
157 writel(mask, &at91_port->idr); in at91_pio3_set_b_periph()
179 writel(mask, &at91_port->idr); in at91_pio3_set_c_periph()
201 writel(mask, &at91_port->idr); in at91_pio3_set_d_periph()
230 writel(mask, &at91_port->idr); in at91_set_port_input()
256 writel(mask, &at91_port->idr); in at91_set_port_output()
/external/mesa3d/docs/_extra/specs/
DEXT_shader_samples_identical.txt165 2 2015/10/23 idr Change from MESA to EXT. Rebase on OpenGL 4.5,
169 3 2015/10/27 idr Typo fixes.
170 4 2015/11/10 idr Rename extension from EXT_shader_multisample_compression
173 5 2015/11/18 idr Fix some typos spotted by gsellers. Change the
176 6 2015/11/19 idr Fix more typos spotted by Nicolai Hähnle.
DEXT_shader_integer_mix.spec127 6 09/12/2013 idr After discussions in Khronos, change vendor
130 5 09/09/2013 idr Add ARB_ES3_compatibility interaction.
DINTEL_shader_atomic_float_minmax.txt194 1 04/19/2018 idr Initial version
195 2 05/05/2018 idr Describe interactions with the capabilities
197 3 05/29/2018 idr Remove mention of 64-bit float support.
198 4 06/22/2018 idr Resolve issue #2.
/external/wpa_supplicant_8/src/eap_server/
Dikev2.c18 const u8 *idr, size_t idr_len);
472 if (pl.idr) in ikev2_process_sa_init_encr()
473 ret = ikev2_process_idr(data, pl.idr, pl.idr_len); in ikev2_process_sa_init_encr()
514 const u8 *idr, size_t idr_len) in ikev2_process_idr() argument
518 if (idr == NULL) { in ikev2_process_idr()
528 id_type = idr[0]; in ikev2_process_idr()
529 idr += 4; in ikev2_process_idr()
533 wpa_hexdump_ascii(MSG_DEBUG, "IKEV2: IDr", idr, idr_len); in ikev2_process_idr()
536 os_memcmp(idr, data->IDr, idr_len) != 0) { in ikev2_process_idr()
547 data->IDr = os_memdup(idr, idr_len); in ikev2_process_idr()
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/external/strace/tests/
Dnetlink_inet_diag.c48 struct inet_diag_req_v2 idr; in send_query() member
55 .idr = { in send_query()
/external/strace/tests-mx32/
Dnetlink_inet_diag.c48 struct inet_diag_req_v2 idr; in send_query() member
55 .idr = { in send_query()
/external/strace/tests-m32/
Dnetlink_inet_diag.c48 struct inet_diag_req_v2 idr; in send_query() member
55 .idr = { in send_query()
/external/v4l2_codec2/accel/
Dh264_decoder.cc116 curr_pic_->idr = slice_hdr->idr_pic_flag; in InitCurrPicture()
117 if (curr_pic_->idr) in InitCurrPicture()
196 if (pic->idr) { in CalculatePicOrderCounts()
250 if (pic->idr) in CalculatePicOrderCounts()
311 if (pic->idr) in CalculatePicOrderCounts()
319 if (pic->idr) { in CalculatePicOrderCounts()
870 if (pic->idr) { in ReferencePictureMarking()
1212 slice_hdr->idr_pic_flag != curr_pic_->idr || in IsNewPrimaryCodedPicture()
Dh264_dpb.h63 bool idr; // IDR picture? variable
/external/u-boot/drivers/spi/
Dzynq_qspi.c57 u32 idr; /* 0x0C */ member
128 writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->idr); in zynq_qspi_init_hw()
361 writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->idr); in zynq_qspi_irq_poll()
404 &regs->idr); in zynq_qspi_irq_poll()
Dzynq_spi.c45 u32 idr; /* 0x0C */ member
106 writel(ZYNQ_SPI_IXR_ALL_MASK, &regs->idr); in zynq_spi_init_hw()
/external/u-boot/arch/arm/mach-at91/include/mach/
Dat91_st.h17 u32 idr; member
Dat91_dbu.h19 u32 idr; /* Interrupt Disable Register WO */ member
Dat91_tc.h19 u32 idr; /* 0x28 Interrupt Disable Register */ member
Dat91_spi.h24 u32 idr; /* 0x18 Interrupt Disable Register */ member
Dat91_mc.h37 u32 idr; /* 0x18 SDRAMC Interrupt Disable Register */ member
Dat91sam9_sdramc.h34 u32 idr; member
Datmel_pio4.h22 u32 idr; /* 0x24 PIO Interrupt Disable Register */ member
Dat91_emac.h23 u32 idr; member
/external/u-boot/arch/arm/mach-stm32mp/include/mach/
Dgpio.h106 u32 idr; /* GPIO port input data */ member
/external/u-boot/arch/arm/include/asm/arch-stm32/
Dgpio.h105 u32 idr; /* GPIO port input data */ member
/external/u-boot/drivers/i2c/
Dat91_i2c.h39 u32 idr; member
/external/u-boot/arch/arm/mach-at91/arm920t/
Dtimer.c44 writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */ in timer_init()
/external/u-boot/drivers/mtd/nand/raw/
Datmel_nand_ecc.h53 u32 idr; /* 0x20 PMECC Interrupt Disable Register */ member

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