| /external/u-boot/arch/microblaze/cpu/ |
| D | interrupts.c | 53 mask = intc->ier; in enable_one_interrupt()
54 intc->ier = (mask | offset); in enable_one_interrupt()
57 intc->ier); in enable_one_interrupt()
58 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in enable_one_interrupt()
68 mask = intc->ier; in disable_one_interrupt()
69 intc->ier = (mask & ~offset); in disable_one_interrupt()
72 intc->ier); in disable_one_interrupt()
73 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in disable_one_interrupt()
106 intc->ier = 0; in intc_init()
111 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in intc_init()
[all …]
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| /external/u-boot/arch/m68k/include/asm/coldfire/ |
| D | eport.h | 18 u8 ier; /* 0x05 */ member
28 u8 ier; /* 0x03 Interrupt Enable */
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| D | ata.h | 54 u8 ier; /* 0x2C */ member
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| /external/u-boot/drivers/serial/ |
| D | serial_mtk.c | 21 u32 ier; member
42 #define dlm ier
209 writel(0, &priv->regs->ier); in mtk_serial_probe()
287 writel(0, &mtk_hsuart##port.regs->ier); \
437 writel(0, &priv.regs->ier); in _debug_uart_init()
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| D | serial_pxa.c | 69 writel(0, &uart_regs->ier); in pxa_setbrg_common()
79 writel(IER_UUE, &uart_regs->ier); in pxa_setbrg_common()
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| D | ns16550.c | 180 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); in NS16550_init()
204 serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); in NS16550_reinit()
265 serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); in _debug_uart_init()
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| /external/u-boot/drivers/gpio/ |
| D | mpc83xx_gpio.c | 157 out_be32(&im->gpio[0].ier, 0xFFFFFFFF); /* Clear all events */ in mpc83xx_gpio_init_f()
166 out_be32(&im->gpio[1].ier, 0xFFFFFFFF); /* Clear all events */ in mpc83xx_gpio_init_f()
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| /external/u-boot/include/ |
| D | ns16550.h | 73 UART_REG(ier); /* 1 */
107 #define dlm ier
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| /external/arm-trusted-firmware/plat/mediatek/mt8183/drivers/uart/ |
| D | uart.c | 53 mmio_write_32(UART_IER(base), uart->registers.ier); in mt_uart_restore()
95 uart->registers.ier = mmio_read_32(UART_IER(base)); in mt_uart_save()
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| D | uart.h | 72 unsigned int ier; member
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| /external/u-boot/arch/microblaze/include/asm/ |
| D | microblaze_intc.h | 13 int ier; /* interrupt enable register */ member
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| /external/u-boot/arch/arm/mach-at91/include/mach/ |
| D | at91_st.h | 16 u32 ier; member
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| D | at91_dbu.h | 18 u32 ier; /* Interrupt Enable Register WO */ member
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| D | at91_tc.h | 18 u32 ier; /* 0x24 Interrupt Enable Register */ member
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| D | at91_spi.h | 23 u32 ier; /* 0x14 Interrupt Enable Register */ member
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| D | at91_mc.h | 36 u32 ier; /* 0x14 SDRAMC Interrupt Enable Register */ member
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| D | at91sam9_sdramc.h | 33 u32 ier; member
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| D | atmel_pio4.h | 21 u32 ier; /* 0x20 PIO Interrupt Enable Register */ member
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| /external/u-boot/arch/arm/include/asm/arch-rockchip/ |
| D | uart.h | 10 unsigned int ier; /* Interrupt enable register. */ member
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| /external/icu/icu4c/source/data/zone/ |
| D | ksh.txt | 297 ld{"de Azore ier Summerzick"}
298 lg{"de Azore ier Zick"}
299 ls{"de Azore ier jewöhnlijje Zick"}
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| /external/u-boot/arch/m68k/include/asm/ |
| D | rtc.h | 20 u32 ier; /* 0x18 Interrupt Enable Register */ member
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| /external/u-boot/arch/arm/include/asm/arch-pxa/ |
| D | regs-uart.h | 21 uint32_t ier; member
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| /external/u-boot/drivers/spi/ |
| D | zynq_qspi.c | 56 u32 ier; /* 0x08 */ member
395 writel(ZYNQ_QSPI_IXR_ALL_MASK, ®s->ier); in zynq_qspi_irq_poll()
440 writel(ZYNQ_QSPI_IXR_ALL_MASK, ®s->ier); in zynq_qspi_start_transfer()
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| /external/u-boot/drivers/i2c/ |
| D | at91_i2c.h | 38 u32 ier; member
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| /external/igt-gpu-tools/tools/ |
| D | intel_display_poller.c | 513 uint32_t iir, ier, imr; in poll_dsl_deiir() local
521 ier = GEN8_DE_PIPE_IER(pipe); in poll_dsl_deiir()
525 ier = DEIER; in poll_dsl_deiir()
530 ier_save = read_reg(ier); in poll_dsl_deiir()
532 write_reg(ier, ier_save & ~bit); in poll_dsl_deiir()
567 write_reg(ier, ier_save); in poll_dsl_deiir()
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