Home
last modified time | relevance | path

Searched refs:miisel (Results 1 – 14 of 14) sorted by relevance

/external/u-boot/board/ti/am43xx/
Dboard.c933 writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); in board_eth_init()
937 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
942 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
946 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
/external/u-boot/board/birdland/bav335x/
Dboard.c409 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
415 writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); in board_eth_init()
/external/u-boot/board/compulab/cm_t335/
Dcm_t335.c139 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
/external/u-boot/board/compulab/cm_t43/
Dcm_t43.c155 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
/external/u-boot/board/silica/pengwyn/
Dboard.c193 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
/external/u-boot/board/phytec/pcm051/
Dboard.c237 writel(RMII_RGMII2_MODE_ENABLE, &cdev->miisel); in board_eth_init()
/external/u-boot/board/gumstix/pepper/
Dboard.c256 writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); in board_eth_init()
/external/u-boot/board/isee/igep003x/
Dboard.c283 &cdev->miisel); in board_eth_init()
/external/u-boot/board/tcl/sl50/
Dboard.c350 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
/external/u-boot/board/siemens/draco/
Dboard.c335 writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); in board_eth_init()
/external/u-boot/board/siemens/rut/
Dboard.c188 writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); in board_eth_init()
/external/u-boot/board/siemens/pxm2/
Dboard.c231 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
/external/u-boot/board/vscom/baltos/
Dboard.c460 writel((GMII1_SEL_RMII | GMII2_SEL_RGMII | RGMII2_IDMODE), &cdev->miisel); in board_eth_init()
/external/u-boot/arch/arm/include/asm/arch-am33xx/
Dcpu.h505 unsigned int miisel; /* offset 0x50 */ member