| /external/u-boot/drivers/ram/stm32mp1/ |
| D | stm32mp1_ddr.c | 210 DDRPHY_REG_DYN(pir),
568 void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir) in stm32mp1_ddrphy_init() argument
570 pir |= DDRPHYC_PIR_INIT; in stm32mp1_ddrphy_init()
571 writel(pir, &phy->pir); in stm32mp1_ddrphy_init()
573 (u32)&phy->pir, pir, readl(&phy->pir)); in stm32mp1_ddrphy_init()
669 u32 pir; in stm32mp1_ddr_init() local
763 pir = DDRPHYC_PIR_DLLSRST | DDRPHYC_PIR_DLLLOCK | DDRPHYC_PIR_ZCAL | in stm32mp1_ddr_init()
767 pir |= DDRPHYC_PIR_DRAMRST; /* only for DDR3 */ in stm32mp1_ddr_init()
769 stm32mp1_ddrphy_init(priv->phy, pir); in stm32mp1_ddr_init()
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| D | stm32mp1_ddr.h | 176 void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir);
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| D | stm32mp1_ddr_regs.h | 142 u32 pir; /* 0x04 R/W PHY Initialization*/ member
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| /external/arm-trusted-firmware/drivers/st/ddr/ |
| D | stm32mp1_ddr.c | 198 DDRPHY_REG_DYN(pir),
368 static void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, uint32_t pir) in stm32mp1_ddrphy_init() argument
370 uint32_t pir_init = pir | DDRPHYC_PIR_INIT; in stm32mp1_ddrphy_init()
372 mmio_write_32((uintptr_t)&phy->pir, pir_init); in stm32mp1_ddrphy_init()
374 (uintptr_t)&phy->pir, pir_init, in stm32mp1_ddrphy_init()
375 mmio_read_32((uintptr_t)&phy->pir)); in stm32mp1_ddrphy_init()
713 uint32_t pir; in stm32mp1_ddr_init() local
839 pir = DDRPHYC_PIR_DLLSRST | DDRPHYC_PIR_DLLLOCK | DDRPHYC_PIR_ZCAL | in stm32mp1_ddr_init()
843 pir |= DDRPHYC_PIR_DRAMRST; /* Only for DDR3 */ in stm32mp1_ddr_init()
846 stm32mp1_ddrphy_init(priv->phy, pir); in stm32mp1_ddr_init()
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| /external/mesa3d/src/compiler/glsl/ |
| D | lower_variable_index_to_cond_assign.cpp | 502 virtual void handle_rvalue(ir_rvalue **pir) in handle_rvalue() argument
507 if (!*pir) in handle_rvalue()
510 ir_dereference_array* orig_deref = (*pir)->as_dereference_array(); in handle_rvalue()
515 *pir = new(ralloc_parent(base_ir)) ir_dereference_variable(var); in handle_rvalue()
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| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | mp.c | 51 out_be32(&pic->pir, 1 << nr); in cpu_reset()
53 (void)in_be32(&pic->pir); in cpu_reset()
54 out_be32(&pic->pir, 0x0); in cpu_reset()
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| /external/u-boot/arch/arm/mach-sunxi/ |
| D | dram_sun6i.c | 159 setbits_le32(&mctl_phy->pir, MCTL_PIR_CLEAR_STATUS); in mctl_channel_init()
160 writel(MCTL_PIR_STEP1, &mctl_phy->pir); in mctl_channel_init()
190 setbits_le32(&mctl_phy->pir, MCTL_PIR_CLEAR_STATUS); in mctl_channel_init()
191 writel(MCTL_PIR_STEP2, &mctl_phy->pir); in mctl_channel_init()
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| D | dram_sun8i_a23.c | 231 writel(0x00000003, &mctl_phy->pir); in mctl_init()
239 writel(0x000005f3, &mctl_phy->pir); in mctl_init()
247 writel(0x5f3, &mctl_phy->pir); in mctl_init()
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| D | dram_sunxi_dw.c | 23 writel(val | PIR_INIT, &mctl_ctl->pir); in mctl_phy_init()
286 writel(PIR_CLRSR, &mctl_ctl->pir); in mctl_h3_zq_calibration_quirk()
313 writel(PIR_CLRSR, &mctl_ctl->pir); in mctl_h3_zq_calibration_quirk()
319 writel(PIR_CLRSR, &mctl_ctl->pir); in mctl_h3_zq_calibration_quirk()
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| D | dram_sun9i.c | 750 clrsetbits_le32(&mctl_phy->pir, MCTL_PIR_MASK, 0x20df3); in mctl_channel_init()
752 clrsetbits_le32(&mctl_phy->pir, MCTL_PIR_MASK, 0x2c573); in mctl_channel_init()
757 while ((readl(&mctl_phy->pir) & MCTL_PIR_INIT) != MCTL_PIR_INIT) { in mctl_channel_init()
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| D | dram_sun50i_h6.c | 60 writel(val, &mctl_phy->pir); in mctl_phy_pir_init()
61 writel(val | BIT(0), &mctl_phy->pir); /* Start initialisation. */ in mctl_phy_pir_init()
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| D | dram_sun8i_a33.c | 175 writel(val, &mctl_ctl->pir); in mctl_set_pir()
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| /external/llvm/include/llvm/ |
| D | PassAnalysisSupport.h | 171 std::pair<AnalysisID, Pass*> pir = std::make_pair(PI,P); in addAnalysisImplsPair() local
172 AnalysisImpls.push_back(pir); in addAnalysisImplsPair()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ |
| D | PassAnalysisSupport.h | 173 std::pair<AnalysisID, Pass*> pir = std::make_pair(PI,P); in addAnalysisImplsPair() local
174 AnalysisImpls.push_back(pir); in addAnalysisImplsPair()
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| /external/u-boot/drivers/ram/rockchip/ |
| D | sdram_rk3188.c | 159 setbits_le32(&publ->pir, PIR_DLLBYP); in phy_dll_bypass_set()
168 clrbits_le32(&publ->pir, PIR_DLLBYP); in phy_dll_bypass_set()
300 setbits_le32(&publ->pir, PIR_INIT | PIR_DLLSRST in phy_init()
328 setbits_le32(&publ->pir, in memory_init()
436 setbits_le32(&publ->pir, PIR_CLRSR); in data_training()
439 setbits_le32(&publ->pir, in data_training()
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| D | sdram_rk3288.c | 159 setbits_le32(&publ->pir, PIR_DLLBYP); in phy_dll_bypass_set()
168 clrbits_le32(&publ->pir, PIR_DLLBYP); in phy_dll_bypass_set()
359 setbits_le32(&publ->pir, PIR_INIT | PIR_DLLSRST in phy_init()
387 setbits_le32(&publ->pir, in memory_init()
495 setbits_le32(&publ->pir, PIR_CLRSR); in data_training()
498 setbits_le32(&publ->pir, in data_training()
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| /external/u-boot/arch/arm/include/asm/arch-sunxi/ |
| D | dram_sun8i_a33.h | 66 u32 pir; /* 0x00 */ member
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| D | dram_sunxi_dw.h | 82 u32 pir; /* 0x00 PHY initialization register */ member
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| D | dram_sun8i_a83t.h | 66 u32 pir; /* 0x00 */ member
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| D | dram_sun9i.h | 94 u32 pir; /* 0x04 PHY initialisation register */ member
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| D | dram_sun50i_h6.h | 149 u32 pir; /* 0x004 */ member
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| D | dram_sun8i_a23.h | 164 u32 pir; /* 0x04 */ member
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| D | dram_sun6i.h | 158 u32 pir; /* 0x04 */ member
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| /external/u-boot/arch/arm/include/asm/arch-rockchip/ |
| D | ddr_rk3288.h | 168 u32 pir; member
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| /external/arm-trusted-firmware/include/drivers/st/ |
| D | stm32mp1_ddr_regs.h | 145 uint32_t pir; /* 0x04 R/W PHY Initialization */ member
|