/external/u-boot/arch/x86/cpu/ivybridge/ |
D | lpc.c | 131 u8 reg8; in pch_power_options() local 180 reg8 = inb(0x61); in pch_power_options() 181 reg8 &= 0x0f; /* Higher Nibble must be 0 */ in pch_power_options() 182 reg8 &= ~(1 << 3); /* IOCHK# NMI Enable */ in pch_power_options() 183 reg8 |= (1 << 2); /* PCI SERR# Disable for now */ in pch_power_options() 184 outb(reg8, 0x61); in pch_power_options() 186 reg8 = inb(0x70); in pch_power_options() 191 reg8 &= ~(1 << 7); /* Set NMI. */ in pch_power_options() 195 reg8 |= (1 << 7); in pch_power_options() 197 outb(reg8, 0x70); in pch_power_options() [all …]
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D | northbridge.c | 213 u8 reg8; in bd82x6x_northbridge_early_init() local 218 dm_pci_read_config8(dev, 0xf3, ®8); in bd82x6x_northbridge_early_init() 219 reg8 &= ~7; /* Clear 2:0 */ in bd82x6x_northbridge_early_init() 222 reg8 |= 1; /* Set bit 0 */ in bd82x6x_northbridge_early_init() 224 dm_pci_write_config8(dev, 0xf3, reg8); in bd82x6x_northbridge_early_init()
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/external/u-boot/board/freescale/mpc8349itx/ |
D | pci.c | 70 u8 reg8; in pci_init_board() local 75 if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0) || in pci_init_board() 76 (i2c_read(CONFIG_SYS_I2C_8574A_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0)) { in pci_init_board() 77 if (reg8 & I2C_8574_PCI66) in pci_init_board()
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/external/u-boot/board/esd/vme8349/ |
D | pci.c | 58 u8 reg8; in pci_init_board() local 63 if ((i2c_read(CONFIG_SYS_I2C_8574_ADDR2, 0, 0, ®8, 1) == 0) || in pci_init_board() 64 (i2c_read(0x38 , 0, 0, ®8, 1) == 0)) { in pci_init_board() 65 if (reg8 & 0x40) { in pci_init_board() 72 if (((reg8 & 0x01) == 0) || ((reg8 & 0x02) == 0)) in pci_init_board()
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/external/elfutils/tests/ |
D | run-dwarfcfi.sh | 36 return address in reg8 46 reg8: location expression: call_frame_cfa plus_uconst(-4) 63 reg8: undefined 80 reg8: undefined 97 reg8: undefined 114 reg8: same_value 131 reg8: undefined
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D | run-addrcfi.sh | 31 return address in reg8 41 integer reg8 (%eip): location expression: call_frame_cfa plus_uconst(-4) 78 return address in reg8 88 integer reg8 (%eip): location expression: call_frame_cfa plus_uconst(-4) 140 integer reg8 (%r8): undefined 206 integer reg8 (%r8): undefined 310 integer reg8 (r8): undefined 1332 integer reg8 (r8): undefined 2360 integer reg8 (r8): undefined 3386 integer reg8 (%r8): same_value [all …]
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/external/u-boot/arch/x86/cpu/intel_common/ |
D | lpc.c | 21 u8 reg8; in enable_spi_prefetch() local 23 dm_pci_read_config8(pch, 0xdc, ®8); in enable_spi_prefetch() 24 reg8 &= ~(3 << 2); in enable_spi_prefetch() 25 reg8 |= (2 << 2); /* Prefetching and Caching Enabled */ in enable_spi_prefetch() 26 dm_pci_write_config8(pch, 0xdc, reg8); in enable_spi_prefetch()
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/external/libvpx/libvpx/vpx_dsp/mips/ |
D | idct16x16_msa.c | 16 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; in vpx_idct16_1d_rows_msa() local 22 LD_SH8(input, 16, reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15); in vpx_idct16_1d_rows_msa() 26 TRANSPOSE8x8_SH_SH(reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15, reg8, in vpx_idct16_1d_rows_msa() 32 DOTP_CONST_PAIR(reg0, reg8, cospi_16_64, cospi_16_64, reg0, reg8); in vpx_idct16_1d_rows_msa() 34 BUTTERFLY_4(reg8, reg0, reg4, reg12, reg2, reg6, reg10, reg14); in vpx_idct16_1d_rows_msa() 36 reg8); in vpx_idct16_1d_rows_msa() 81 BUTTERFLY_4(reg8, reg10, reg11, reg5, loc0, reg4, reg9, loc1); in vpx_idct16_1d_rows_msa() 87 BUTTERFLY_4(reg12, reg14, reg13, reg3, reg8, reg6, reg7, reg5); in vpx_idct16_1d_rows_msa() 97 TRANSPOSE8x8_SH_SH(reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14, reg0, in vpx_idct16_1d_rows_msa() 98 reg2, reg4, reg6, reg8, reg10, reg12, reg14); in vpx_idct16_1d_rows_msa() [all …]
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/external/u-boot/drivers/video/ |
D | ivybridge_igd.c | 657 u8 reg8; in sandybridge_setup_graphics() local 690 dm_pci_read_config8(video_dev, MSAC, ®8); in sandybridge_setup_graphics() 691 reg8 &= ~0x06; in sandybridge_setup_graphics() 692 reg8 |= 0x02; in sandybridge_setup_graphics() 693 dm_pci_write_config8(video_dev, MSAC, reg8); in sandybridge_setup_graphics()
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/external/u-boot/drivers/sound/ |
D | hda_codec.c | 150 uint reg8; in hda_codec_detect() local 160 reg8 = readb(®s->statests) & 0xf; in hda_codec_detect() 161 if (!reg8) in hda_codec_detect() 164 return reg8; in hda_codec_detect()
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/external/u-boot/arch/arm/lib/ |
D | memcpy.S | 24 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 25 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8} 36 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort 37 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
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/external/u-boot/board/gdsys/common/ |
D | osd.c | 205 u8 reg0, reg4, reg8, reg12, reg18, reg20; in ics8n3qv01_set() local 223 reg8 = mfrac >> 1; in ics8n3qv01_set() 224 i2c_reg_write(ICS8N3QV01_I2C_ADDR, 8, reg8); in ics8n3qv01_set()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/ |
D | dwarfdump-debug-frame-simple.test | 9 ; FRAMES-NEXT: DW_CFA_offset: reg8 -4
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/external/llvm/test/DebugInfo/ |
D | dwarfdump-debug-frame-simple.test | 10 ; FRAMES-NEXT: DW_CFA_offset: reg8 -4
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/external/libyuv/files/source/ |
D | scale_msa.cc | 767 v8i16 reg6, reg7, reg8, reg9, reg10, reg11; in ScaleRowDown34_0_Box_MSA() local 810 reg8 = (v8i16)__msa_dotp_u_h(vec8, const2); in ScaleRowDown34_0_Box_MSA() 822 reg8 = __msa_srar_h(reg8, shft2); in ScaleRowDown34_0_Box_MSA() 828 reg2 = reg2 * 3 + reg8; in ScaleRowDown34_0_Box_MSA() 861 v8i16 reg6, reg7, reg8, reg9, reg10, reg11; in ScaleRowDown34_1_Box_MSA() local 904 reg8 = (v8i16)__msa_dotp_u_h(vec8, const2); in ScaleRowDown34_1_Box_MSA() 916 reg8 = __msa_srar_h(reg8, shft2); in ScaleRowDown34_1_Box_MSA() 922 reg2 += reg8; in ScaleRowDown34_1_Box_MSA()
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D | row_msa.cc | 826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local 900 reg8 = reg2 * const_0x4A; in ARGBToUVRow_MSA() 904 reg8 += reg4 * const_0x26; in ARGBToUVRow_MSA() 916 reg6 -= reg8; in ARGBToUVRow_MSA() 2678 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in I444ToARGBRow_MSA() local 2705 reg8 = (v4i32)__msa_ilvr_h((v8i16)zero, (v8i16)vec1); in I444ToARGBRow_MSA() 2711 reg4 -= reg8 * vec_vr; in I444ToARGBRow_MSA() 2713 reg2 -= reg8 * vec_vg; in I444ToARGBRow_MSA()
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/external/libvpx/libvpx/third_party/libyuv/source/ |
D | scale_msa.cc | 767 v8i16 reg6, reg7, reg8, reg9, reg10, reg11; in ScaleRowDown34_0_Box_MSA() local 810 reg8 = (v8i16)__msa_dotp_u_h(vec8, const2); in ScaleRowDown34_0_Box_MSA() 822 reg8 = __msa_srar_h(reg8, shft2); in ScaleRowDown34_0_Box_MSA() 828 reg2 = reg2 * 3 + reg8; in ScaleRowDown34_0_Box_MSA() 861 v8i16 reg6, reg7, reg8, reg9, reg10, reg11; in ScaleRowDown34_1_Box_MSA() local 904 reg8 = (v8i16)__msa_dotp_u_h(vec8, const2); in ScaleRowDown34_1_Box_MSA() 916 reg8 = __msa_srar_h(reg8, shft2); in ScaleRowDown34_1_Box_MSA() 922 reg2 += reg8; in ScaleRowDown34_1_Box_MSA()
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D | row_msa.cc | 826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local 900 reg8 = reg2 * const_0x4A; in ARGBToUVRow_MSA() 904 reg8 += reg4 * const_0x26; in ARGBToUVRow_MSA() 916 reg6 -= reg8; in ARGBToUVRow_MSA() 2678 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in I444ToARGBRow_MSA() local 2705 reg8 = (v4i32)__msa_ilvr_h((v8i16)zero, (v8i16)vec1); in I444ToARGBRow_MSA() 2711 reg4 -= reg8 * vec_vr; in I444ToARGBRow_MSA() 2713 reg2 -= reg8 * vec_vg; in I444ToARGBRow_MSA()
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/external/u-boot/include/ |
D | ns16550.h | 81 UART_REG(reg8); /* 8 */
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/external/libaom/libaom/av1/common/arm/ |
D | convolve_neon.c | 1168 int16x4_t reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9, in av1_convolve_2d_sr_neon() local 1203 reg8 = vget_low_s16(vreinterpretq_s16_u16(vmovl_u8(t1))); in av1_convolve_2d_sr_neon() 1214 d1 = convolve8_4x4(reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, in av1_convolve_2d_sr_neon() 1217 d2 = convolve8_4x4(reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9, in av1_convolve_2d_sr_neon() 1220 d3 = convolve8_4x4(reg3, reg4, reg5, reg6, reg7, reg8, reg9, reg10, in av1_convolve_2d_sr_neon() 1223 d4 = convolve8_4x4(reg4, reg5, reg6, reg7, reg8, reg9, reg10, reg11, in av1_convolve_2d_sr_neon() 1226 d5 = convolve8_4x4(reg5, reg6, reg7, reg8, reg9, reg10, reg11, reg12, in av1_convolve_2d_sr_neon() 1229 d6 = convolve8_4x4(reg6, reg7, reg8, reg9, reg10, reg11, reg12, reg13, in av1_convolve_2d_sr_neon() 1232 d7 = convolve8_4x4(reg7, reg8, reg9, reg10, reg11, reg12, reg13, reg14, in av1_convolve_2d_sr_neon() 1252 reg0 = reg8; in av1_convolve_2d_sr_neon()
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/external/vixl/src/aarch64/ |
D | operands-aarch64.h | 491 const CPURegister& reg8 = NoReg); 505 const CPURegister& reg8 = NoCPUReg); 517 const CPURegister& reg8 = NoReg);
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/external/v8/src/codegen/arm64/ |
D | register-arm64.h | 491 const CPURegister& reg7 = NoReg, const CPURegister& reg8 = NoReg); 501 const CPURegister& reg7 = NoCPUReg, const CPURegister& reg8 = NoCPUReg);
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/external/llvm/include/llvm/Support/ |
D | Dwarf.def | 209 HANDLE_DW_OP(0x58, reg8)
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/external/llvm/test/CodeGen/AMDGPU/ |
D | big_alu.ll | 5 …eg5, <4 x float> inreg %reg6, <4 x float> inreg %reg7, <4 x float> inreg %reg8, <4 x float> inreg … 13 %tmp6 = extractelement <4 x float> %reg8, i32 0 18 %tmp11 = extractelement <4 x float> %reg8, i32 0 23 %tmp16 = extractelement <4 x float> %reg8, i32 0 28 %tmp21 = extractelement <4 x float> %reg8, i32 0
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | big_alu.ll | 5 …eg5, <4 x float> inreg %reg6, <4 x float> inreg %reg7, <4 x float> inreg %reg8, <4 x float> inreg … 13 %tmp6 = extractelement <4 x float> %reg8, i32 0 18 %tmp11 = extractelement <4 x float> %reg8, i32 0 23 %tmp16 = extractelement <4 x float> %reg8, i32 0 28 %tmp21 = extractelement <4 x float> %reg8, i32 0
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