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Searched refs:MC_SECURITY_CFG0_0 (Results 1 – 9 of 9) sorted by relevance

/external/arm-trusted-firmware/plat/nvidia/tegra/include/t132/
Dtegra_def.h98 #define MC_SECURITY_CFG0_0 U(0x70) macro
/external/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/memctrl/
Dmemctrl_v1.c91 tegra_mc_write_32(MC_SECURITY_CFG0_0, phys_base); in tegra_memctrl_tzdram_setup()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_trampoline.S133 mov x3, #MC_SECURITY_CFG0_0
Dplat_memctrl.c550 tegra_mc_write_32(MC_SECURITY_CFG0_0, (uint32_t)phys_base); in plat_memctrl_tzdram_setup()
565 val |= tegra_mc_read_32(MC_SECURITY_CFG0_0) & MC_SECURITY_BOM_MASK; in plat_memctrl_tzdram_setup()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_trampoline.S132 mov x3, #MC_SECURITY_CFG0_0
Dplat_memctrl.c721 tegra_mc_write_32(MC_SECURITY_CFG0_0, (uint32_t)phys_base); in plat_memctrl_tzdram_setup()
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t210/
Dtegra_def.h226 #define MC_SECURITY_CFG0_0 U(0x70) macro
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t186/
Dtegra_def.h147 #define MC_SECURITY_CFG0_0 U(0x70) macro
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t194/
Dtegra_def.h79 #define MC_SECURITY_CFG0_0 U(0x70) macro