/external/llvm/lib/CodeGen/ |
D | AggressiveAntiDepBreaker.cpp | 583 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | AggressiveAntiDepBreaker.cpp | 601 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters() local
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/external/llvm-project/llvm/lib/CodeGen/ |
D | AggressiveAntiDepBreaker.cpp | 596 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters() local
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/external/tensorflow/tensorflow/core/grappler/ |
D | op_types.cc | 579 bool IsSub(const NodeDef& node) { return node.op() == "Sub"; } in IsSub() function
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonConstExtenders.cpp | 1799 bool IsSub = ExtOpc == Hexagon::S4_subaddi; in replaceInstrExpr() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonConstExtenders.cpp | 1782 bool IsSub = ExtOpc == Hexagon::S4_subaddi; in replaceInstrExpr() local
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/external/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 354 bool IsSub = Offset < 0; in BuildStackAdjustment() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 382 bool IsSub = Offset < 0; in BuildStackAdjustment() local
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D | X86ISelLowering.cpp | 44614 bool IsSub = N->getOpcode() == ISD::SUB; in combineAddOrSubToADCOrSBB() local
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/external/llvm-project/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 351 bool IsSub = Offset < 0; in BuildStackAdjustment() local
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D | X86ISelLowering.cpp | 48025 bool IsSub = N->getOpcode() == ISD::SUB; in combineAddOrSubToADCOrSBB() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 3086 bool IsSub = Opc == ARM::SUBrr || Opc == ARM::t2SUBrr || in optimizeCompareInstr() local
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D | ARMISelDAGToDAG.cpp | 2569 bool IsSub = SDValueToConstBool(N->getOperand(2)); in SelectBaseMVE_VMLLDAV() local
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 3136 bool IsSub = Opc == ARM::SUBrr || Opc == ARM::t2SUBrr || in optimizeCompareInstr() local
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D | ARMISelDAGToDAG.cpp | 2653 bool IsSub = SDValueToConstBool(N->getOperand(2)); in SelectBaseMVE_VMLLDAV() local
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/external/llvm-project/clang/lib/Sema/ |
D | SemaChecking.cpp | 13966 bool IsSub, ASTContext &Ctx) { in getAlignmentAndOffsetFromBinAddOrSub()
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/external/llvm-project/clang/lib/AST/ |
D | ExprConstant.cpp | 12299 bool IsSub) { in addOrSubLValueAsInteger()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 14225 bool IsSub = (LD->getAddressingMode() == ISD::PRE_DEC || in ForwardStoreValueToDirectLoad() local
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