/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMHazardRecognizer.h | 34 ARMHazardRecognizer(const InstrItineraryData *ItinData, in ARMHazardRecognizer()
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D | ARMBaseInstrInfo.cpp | 3327 static unsigned getNumMicroOpsSwiftLdSt(const InstrItineraryData *ItinData, in getNumMicroOpsSwiftLdSt() 3629 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() 3743 ARMBaseInstrInfo::getVLDMDefCycle(const InstrItineraryData *ItinData, in getVLDMDefCycle() 3800 ARMBaseInstrInfo::getLDMDefCycle(const InstrItineraryData *ItinData, in getLDMDefCycle() 3835 ARMBaseInstrInfo::getVSTMUseCycle(const InstrItineraryData *ItinData, in getVSTMUseCycle() 3875 ARMBaseInstrInfo::getSTMUseCycle(const InstrItineraryData *ItinData, in getSTMUseCycle() 3904 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 4248 int ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 4285 const InstrItineraryData *ItinData, const MachineInstr &DefMI, in getOperandLatencyImpl() 4345 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMHazardRecognizer.h | 35 ARMHazardRecognizer(const InstrItineraryData *ItinData, in ARMHazardRecognizer()
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D | ARMBaseInstrInfo.cpp | 2773 static unsigned getNumMicroOpsSwiftLdSt(const InstrItineraryData *ItinData, in getNumMicroOpsSwiftLdSt() 3070 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() 3184 ARMBaseInstrInfo::getVLDMDefCycle(const InstrItineraryData *ItinData, in getVLDMDefCycle() 3225 ARMBaseInstrInfo::getLDMDefCycle(const InstrItineraryData *ItinData, in getLDMDefCycle() 3260 ARMBaseInstrInfo::getVSTMUseCycle(const InstrItineraryData *ItinData, in getVSTMUseCycle() 3300 ARMBaseInstrInfo::getSTMUseCycle(const InstrItineraryData *ItinData, in getSTMUseCycle() 3329 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 3673 int ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 3710 const InstrItineraryData *ItinData, const MachineInstr &DefMI, in getOperandLatencyImpl() 3770 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCHazardRecognizers.h | 35 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer()
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D | PPCInstrInfo.h | 122 int getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
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D | PPCInstrInfo.cpp | 111 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 141 int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCHazardRecognizers.h | 34 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer()
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D | PPCInstrInfo.h | 314 int getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCHazardRecognizers.h | 34 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer()
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D | PPCInstrInfo.h | 216 int getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
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D | PPCInstrInfo.cpp | 145 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 175 int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
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/external/llvm/lib/CodeGen/ |
D | TargetInstrInfo.cpp | 981 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 997 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1012 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() 1043 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1057 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries(); in hasLowDefLatency() local 1068 int TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 1081 const InstrItineraryData *ItinData, const MachineInstr &DefMI) const { in computeDefOperandLatency() argument 1095 const InstrItineraryData *ItinData, const MachineInstr &DefMI, in computeOperandLatency()
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/external/llvm-project/llvm/include/llvm/CodeGen/ |
D | ScoreboardHazardRecognizer.h | 94 const InstrItineraryData *ItinData; variable
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ScoreboardHazardRecognizer.h | 94 const InstrItineraryData *ItinData; variable
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/external/llvm/lib/Target/AMDGPU/ |
D | R600InstrInfo.h | 209 int getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency()
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/external/llvm/include/llvm/CodeGen/ |
D | ScoreboardHazardRecognizer.h | 91 const InstrItineraryData *ItinData; variable
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetInstrInfo.cpp | 1036 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 1052 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1067 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() 1098 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1112 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries(); in hasLowDefLatency() local 1187 int TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 1200 const InstrItineraryData *ItinData, const MachineInstr &DefMI) const { in computeDefOperandLatency() argument
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/external/llvm-project/llvm/lib/CodeGen/ |
D | TargetInstrInfo.cpp | 1092 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 1108 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1123 unsigned TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() 1154 unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1168 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries(); in hasLowDefLatency() local 1260 int TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 1273 const InstrItineraryData *ItinData, const MachineInstr &DefMI) const { in computeDefOperandLatency() argument
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/external/llvm/utils/TableGen/ |
D | SubtargetEmitter.cpp | 274 Record *ItinData, in FormItineraryStageString() 318 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData, in FormItineraryOperandCycleString() 336 Record *ItinData, in FormItineraryBypassString() 439 Record *ItinData = ProcModel.ItinDefList[SchedClassIdx]; in EmitStageAndOperandCycleData() local
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D | DFAPacketizerEmitter.cpp | 740 Record *ItinData, in collectOneInsnClass() 819 Record *ItinData = ItinDataList[j]; in collectAllInsnClasses() local
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 3377 static unsigned getNumMicroOpsSwiftLdSt(const InstrItineraryData *ItinData, in getNumMicroOpsSwiftLdSt() 3679 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() 3793 ARMBaseInstrInfo::getVLDMDefCycle(const InstrItineraryData *ItinData, in getVLDMDefCycle() 3834 ARMBaseInstrInfo::getLDMDefCycle(const InstrItineraryData *ItinData, in getLDMDefCycle() 3869 ARMBaseInstrInfo::getVSTMUseCycle(const InstrItineraryData *ItinData, in getVSTMUseCycle() 3909 ARMBaseInstrInfo::getSTMUseCycle(const InstrItineraryData *ItinData, in getSTMUseCycle() 3938 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 4282 int ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 4319 const InstrItineraryData *ItinData, const MachineInstr &DefMI, in getOperandLatencyImpl() 4379 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() [all …]
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/external/llvm-project/llvm/utils/TableGen/ |
D | SubtargetEmitter.cpp | 297 Record *ItinData, in FormItineraryStageString() 340 void SubtargetEmitter::FormItineraryOperandCycleString(Record *ItinData, in FormItineraryOperandCycleString() 358 Record *ItinData, in FormItineraryBypassString() 459 Record *ItinData = ProcModel.ItinDefList[SchedClassIdx]; in EmitStageAndOperandCycleData() local
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 1854 unsigned HexagonInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 4075 const InstrItineraryData *ItinData, const MachineInstr &MI) const { in getInstrTimingClassLatency() argument 4094 int HexagonInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 1882 unsigned HexagonInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 4201 const InstrItineraryData *ItinData, const MachineInstr &MI) const { in getInstrTimingClassLatency() argument 4220 int HexagonInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
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