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/external/cpuinfo/src/arm/linux/
Dclusters.c22 …* Assigns logical processors to clusters of cores using heuristic based on the typical configurati…
34 …* configuration of logical processors 4-7 is not reported (all remaining processors 4-7 form c…
36 …* of logical processors 4-9 is not reported (processors 4-7 form cluster 1, and processors 8-9…
38 …* Heuristic assignment of processors to the above pre-defined clusters fails if such assignment wo…
41 …* - Processors in a heuristic cluster have no OS-provided cluster siblings information, but have k…
43 …* - Processors in a heuristic cluster have no OS-provided cluster siblings information, but have k…
46 …* If the heuristic assignment of processors to clusters of cores fails, all processors' clusters a…
48 …* @param usable_processors - number of processors in the @p processors array with CPUINFO_LINUX_FL…
49 * @param max_processors - number of elements in the @p processors array.
50 …* @param[in,out] processors - processor descriptors with pre-parsed POSSIBLE and PRESENT flags, mi…
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Dmidr.c27 /* Number of cores (logical processors) */
70 …* As these are all new processors, there is hope that this table won't uncontrollably grow over ti…
497 * @param cluster_leaders - indices of core clusters' leaders in the @p processors array.
498 * @param processors_count - number of usable logical processors in the system.
499 …* @param[in,out] processors - array of logical processor descriptions with pre-parsed MIDR, maximu…
501 …* Upon successful return, processors[i].midr for all clusters' leaders…
516 struct cpuinfo_arm_linux_processor processors[restrict static processors_count], in cpuinfo_arm_linux_detect_cluster_midr_by_chipset()
530 …if (cluster_configs[c].cluster_cores[cluster] != processors[cluster_leader].package_processor_coun… in cpuinfo_arm_linux_detect_cluster_midr_by_chipset()
542 if (processors[cluster_leader].flags & CPUINFO_ARM_LINUX_VALID_IMPLEMENTER) { in cpuinfo_arm_linux_detect_cluster_midr_by_chipset()
545 if (processors[cluster_leader].flags & CPUINFO_ARM_LINUX_VALID_VARIANT) { in cpuinfo_arm_linux_detect_cluster_midr_by_chipset()
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Dinit.c36 struct cpuinfo_arm_linux_processor* processors) in cluster_siblings_parser() argument
38 processors[processor].flags |= CPUINFO_LINUX_FLAG_PACKAGE_CLUSTER; in cluster_siblings_parser()
39 uint32_t package_leader_id = processors[processor].package_leader_id; in cluster_siblings_parser()
42 if (!bitmask_all(processors[sibling].flags, CPUINFO_LINUX_FLAG_VALID)) { in cluster_siblings_parser()
48 const uint32_t sibling_package_leader_id = processors[sibling].package_leader_id; in cluster_siblings_parser()
53 processors[sibling].package_leader_id = package_leader_id; in cluster_siblings_parser()
54 processors[sibling].flags |= CPUINFO_LINUX_FLAG_PACKAGE_CLUSTER; in cluster_siblings_parser()
57 processors[processor].package_leader_id = package_leader_id; in cluster_siblings_parser()
66 /* Move usable processors towards the start of the array */ in cmp_arm_linux_processor()
106 struct cpuinfo_processor* processors = NULL; in cpuinfo_arm_linux_init() local
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Daarch64-isa.c35 * Use a MIDR-based heuristic to whitelist processors known to support it: in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
36 * - Processors with Cortex-A55 cores in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
37 * - Processors with Cortex-A65 cores in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
38 * - Processors with Cortex-A75 cores in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
39 * - Processors with Cortex-A76 cores in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
40 * - Processors with Cortex-A77 cores in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
41 * - Processors with Exynos M4 cores in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
42 * - Processors with Exynos M5 cores in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
84 * Use a MIDR-based heuristic to whitelist processors known to support it. in cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo()
Daarch32-isa.c58 * Use a MIDR-based heuristic to whitelist processors known to support it: in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
59 * - Processors with Cortex-A55 cores in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
60 * - Processors with Cortex-A65 cores in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
61 * - Processors with Cortex-A75 cores in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
62 * - Processors with Cortex-A76 cores in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
63 * - Processors with Cortex-A77 cores in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
64 * - Processors with Exynos M4 cores in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
65 * - Processors with Exynos M5 cores in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
94 * Use a MIDR-based heuristic to whitelist processors known to support it. in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
118 * ARM11 (ARM 1136/1156/1176/11 MPCore) processors can report v7 architecture in cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo()
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/external/bazelbuild-rules_android/rules/
Dprocessing_pipeline.bzl39 processors = "Ordered dictionary of processing functions.",
44 def _make_processing_pipeline(processors = dict(), finalize = None):
48 processors: Ordered dictionary of processing functions.
55 processors = processors,
78 for execute in processing_pipeline.processors.values():
91 def _prepend(processors, **new_processors):
92 """Prepends processors in a given processing pipeline.
95 processors: The dictionary representing the processing pipeline.
96 **new_processors: The processors to add where the key represents the
107 for key in processors.keys():
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/external/cpuinfo/src/x86/windows/
Dinit.c40 const struct cpuinfo_processor* processors, in cpuinfo_x86_count_caches() argument
52 const uint32_t apic_id = processors[i].apic_id; in cpuinfo_x86_count_caches()
108 struct cpuinfo_processor* processors = NULL; in cpuinfo_x86_windows_init() local
142 cpuinfo_log_debug("detected %"PRIu32" processors in group %"PRIu32, in cpuinfo_x86_windows_init()
150 cpuinfo_log_debug("detected %"PRIu32" processors before group %"PRIu32, in cpuinfo_x86_windows_init()
155processors = HeapAlloc(heap, HEAP_ZERO_MEMORY, processors_count * sizeof(struct cpuinfo_processor)… in cpuinfo_x86_windows_init()
156 if (processors == NULL) { in cpuinfo_x86_windows_init()
157 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" logical processors", in cpuinfo_x86_windows_init()
219 /* Bitmask representing processors in this group belonging to this package */ in cpuinfo_x86_windows_init()
224 processors[processor_id].package = (const struct cpuinfo_package*) NULL + package_id; in cpuinfo_x86_windows_init()
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/external/llvm-project/llvm/lib/Support/
DX86TargetParser.cpp174 // Intel Skylake processors.
189 // Intel 10nm processors.
213 // Intel Atom processors.
235 // K7 and K8 architecture processors.
247 // Bobcat architecture processors.
257 // AMD Bulldozer architecture processors.
272 // AMD Zen architecture processors.
289 constexpr ProcInfo Processors[] = { variable
292 // i386-generation processors.
294 // i486-generation processors.
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/external/dagger2/java/dagger/hilt/processor/internal/
DComponents.java51 if (Processors.hasAnnotation(element, ClassNames.INSTALL_IN) in getComponents()
52 || Processors.hasAnnotation(element, ClassNames.TEST_INSTALL_IN)) { in getComponents()
61 && Processors.hasAnnotation(enclosing, ClassNames.MODULE) in getComponents()
66 if (Processors.hasErrorTypeAnnotation(element)) { in getComponents()
92 Processors.hasAnnotation(element, ClassNames.INSTALL_IN) in getHiltInstallInComponents()
93 || Processors.hasAnnotation(element, ClassNames.TEST_INSTALL_IN)); in getHiltInstallInComponents()
97 Processors.hasAnnotation(element, ClassNames.INSTALL_IN) in getHiltInstallInComponents()
98 ? Processors.getAnnotationClassValues( in getHiltInstallInComponents()
100 Processors.getAnnotationMirror(element, ClassNames.INSTALL_IN), in getHiltInstallInComponents()
102 : Processors.getAnnotationClassValues( in getHiltInstallInComponents()
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DBUILD16 # Internal code for implementing Hilt processors.
28 ":processors",
54 name = "processors",
57 "Processors.java",
93 ":processors",
107 ":processors",
127 ":processors",
/external/cpuinfo/src/x86/linux/
Dinit.c34 /* Move usable processors towards the start of the array */ in cmp_x86_linux_processor()
146 struct cpuinfo_processor* processors = NULL; in cpuinfo_x86_linux_init() local
159 cpuinfo_log_debug("system maximum processors count: %"PRIu32, max_processors_count); in cpuinfo_x86_linux_init()
163 cpuinfo_log_debug("maximum possible processors count: %"PRIu32, max_possible_processors_count); in cpuinfo_x86_linux_init()
166 cpuinfo_log_debug("maximum present processors count: %"PRIu32, max_present_processors_count); in cpuinfo_x86_linux_init()
184 "failed to allocate %zu bytes for descriptions of %"PRIu32" x86 logical processors", in cpuinfo_x86_linux_init()
232 processors = calloc(processors_count, sizeof(struct cpuinfo_processor)); in cpuinfo_x86_linux_init()
233 if (processors == NULL) { in cpuinfo_x86_linux_init()
234 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" logical processors", in cpuinfo_x86_linux_init()
266 …uinfo_log_error("failed to allocate %zu bytes for mapping entries of %"PRIu32" logical processors", in cpuinfo_x86_linux_init()
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/external/dagger2/java/dagger/hilt/android/processor/internal/customtestapplication/
DCustomTestApplicationMetadata.java29 import dagger.hilt.processor.internal.Processors;
49 return Processors.append( in appName()
50 Processors.getEnclosedClassName(ClassName.get(element())), "_Application"); in appName()
55 Processors.hasAnnotation(element, ClassNames.CUSTOM_TEST_APPLICATION), in of()
75 Processors.getAnnotationClassValue( in getBaseElement()
77 Processors.getAnnotationMirror(element, ClassNames.CUSTOM_TEST_APPLICATION), in getBaseElement()
83 !Processors.hasAnnotation(baseSuperclassElement, ClassNames.HILT_ANDROID_APP), in getBaseElement()
92 .filter(field -> Processors.hasAnnotation(field, ClassNames.INJECT)) in getBaseElement()
105 .filter(method -> Processors.hasAnnotation(method, ClassNames.INJECT)) in getBaseElement()
118 .filter(method -> Processors.hasAnnotation(method, ClassNames.INJECT)) in getBaseElement()
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/external/skqp/src/gpu/
DGrPipeline.cpp20 GrProcessorSet&& processors, in GrPipeline() argument
22 SkASSERT(processors.isFinalized()); in GrPipeline()
39 fXferProcessor = processors.refXferProcessor(); in GrPipeline()
51 fNumColorProcessors = processors.numColorFragmentProcessors(); in GrPipeline()
53 processors.numCoverageFragmentProcessors() + in GrPipeline()
57 for (int i = 0; i < processors.numColorFragmentProcessors(); ++i, ++currFPIdx) { in GrPipeline()
58 fFragmentProcessors[currFPIdx] = processors.detachColorFragmentProcessor(i); in GrPipeline()
63 for (int i = 0; i < processors.numCoverageFragmentProcessors(); ++i, ++currFPIdx) { in GrPipeline()
64 fFragmentProcessors[currFPIdx] = processors.detachCoverageFragmentProcessor(i); in GrPipeline()
DGrProcessorAnalysis.h98 const GrFragmentProcessor* const* processors,
104 * Are all the fragment processors compatible with conflating coverage with color prior to the
105 * the first fragment processor. This result assumes that processors that should be eliminated
113 * Do any of the fragment processors require local coords. This result assumes that
114 * processors that should be eliminated as indicated by initialProcessorsToEliminate() are in
120 * If we detected that the result after the first N processors is a known color then we
121 * eliminate those N processors and replace the GrDrawOp's color input to the GrPipeline with
123 * there are only N processors) sees its expected input. If this returns 0 then there are no
124 * processors to eliminate.
/external/dagger2/java/dagger/hilt/android/processor/internal/androidentrypoint/
DAndroidEntryPointMetadata.java40 import dagger.hilt.processor.internal.Processors;
101 return Processors.hasAnnotation(element(), AndroidClassNames.OPTIONAL_INJECT); in allowsOptionalInjection()
126 return Processors.append( in injectorClassName()
127 Processors.getEnclosedClassName(elementClassName()), "_GeneratedInjector"); in injectorClassName()
135 return "inject" + Processors.getEnclosedName(elementClassName()); in injectMethodName()
162 return Processors.prepend(Processors.getEnclosedClassName(ClassName.get(element)), prefix); in generatedClassName()
241 Processors.getAnnotationClassValue( in of()
243 Processors.getAnnotationMirror(androidEntryPointElement, annotationClassName), in of()
447 if (Processors.hasAnnotation(element, AndroidClassNames.HILT_ANDROID_APP)) { in of()
455 Processors.isAssignableFrom(baseElement, AndroidClassNames.APPLICATION), in forHiltAndroidApp()
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/external/cpuinfo/src/x86/mach/
Dinit.c21 struct cpuinfo_processor* processors = NULL; in cpuinfo_x86_mach_init() local
32 processors = calloc(mach_topology.threads, sizeof(struct cpuinfo_processor)); in cpuinfo_x86_mach_init()
33 if (processors == NULL) { in cpuinfo_x86_mach_init()
34 cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" logical processors", in cpuinfo_x86_mach_init()
116 processors[i].smt_id = smt_id; in cpuinfo_x86_mach_init()
117 processors[i].core = cores + i / threads_per_core; in cpuinfo_x86_mach_init()
118 processors[i].cluster = clusters + i / threads_per_package; in cpuinfo_x86_mach_init()
119 processors[i].package = packages + i / threads_per_package; in cpuinfo_x86_mach_init()
120 processors[i].apic_id = apic_id; in cpuinfo_x86_mach_init()
207 processors[t].cache.l1i = &l1i[t / threads_per_l1]; in cpuinfo_x86_mach_init()
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/external/skia/src/gpu/
DGrProcessorAnalysis.h89 * GrColorFragmentProcessorAnalysis gathers invariant data from a set of color fragment processors.
104 * Are all the fragment processors compatible with conflating coverage with color prior to the
105 * the first fragment processor. This result assumes that processors that should be eliminated
113 * Do any of the fragment processors require local coords. This result assumes that
114 * processors that should be eliminated as indicated by initialProcessorsToEliminate() are in
120 * If we detected that the result after the first N processors is a known color then we
121 * eliminate those N processors and replace the GrDrawOp's color input to the GrPipeline with
123 * there are only N processors) sees its expected input. If this returns 0 then there are no
124 * processors to eliminate.
DGrPipeline.cpp43 GrPipeline::GrPipeline(const InitArgs& args, GrProcessorSet&& processors, in GrPipeline() argument
45 : GrPipeline(args, processors.refXferProcessor(), appliedClip.hardClip()) { in GrPipeline()
46 SkASSERT(processors.isFinalized()); in GrPipeline()
48 fNumColorProcessors = processors.hasColorFragmentProcessor() ? 1 : 0; in GrPipeline()
50 (processors.hasCoverageFragmentProcessor() ? 1 : 0) + in GrPipeline()
55 if (processors.hasColorFragmentProcessor()) { in GrPipeline()
56 fFragmentProcessors[currFPIdx++] = processors.detachColorFragmentProcessor(); in GrPipeline()
58 if (processors.hasCoverageFragmentProcessor()) { in GrPipeline()
59 fFragmentProcessors[currFPIdx++] = processors.detachCoverageFragmentProcessor(); in GrPipeline()
/external/dagger2/java/dagger/hilt/processor/internal/aggregateddeps/
DPkgPrivateMetadata.java27 import dagger.hilt.processor.internal.Processors;
58 return Processors.prepend( in generatedClassName()
59 Processors.getEnclosedClassName(ClassName.get(getTypeElement())), PREFIX); in generatedClassName()
73 if (Processors.hasAnnotation(element, ClassNames.INSTALL_IN)) { in of()
74 installIn = Optional.of(Processors.getAnnotationMirror(element, ClassNames.INSTALL_IN)); in of()
75 } else if (Processors.hasAnnotation(element, ClassNames.TEST_INSTALL_IN)) { in of()
76 installIn = Optional.of(Processors.getAnnotationMirror(element, ClassNames.TEST_INSTALL_IN)); in of()
86 if (Processors.requiresModuleInstance(elements, MoreElements.asType(element))) { in of()
DAggregatedDepsProcessor.java42 import dagger.hilt.processor.internal.Processors;
156 Processors.isTopLevel(module) in processModule()
159 || Processors.hasAnnotation(module.getEnclosingElement(), ClassNames.HILT_ANDROID_TEST), in processModule()
177 .filter(method -> !Processors.hasDaggerAbstractMethodAnnotation(method)) in processModule()
188 if (Processors.hasAnnotation(module, ClassNames.TEST_INSTALL_IN)) { in processModule()
201 Processors.getAnnotationMirror(module, ClassNames.TEST_INSTALL_IN); in processModule()
203 Processors.getAnnotationClassValues(getElementUtils(), testInstallIn, "replaces"); in processModule()
215 !Processors.hasAnnotation(replacedModule, ClassNames.INSTALL_IN)) in processModule()
295 !Processors.hasAnnotation(element, ClassNames.TEST_INSTALL_IN), in processEntryPoint()
348 .filter(annotation -> Processors.hasAnnotation(element, annotation)) in getAnnotation()
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/external/jarjar/src/main/com/tonicsystems/jarjar/
DMainProcessor.java58 List<JarProcessor> processors = new ArrayList<JarProcessor>(); in MainProcessor() local
60 processors.add(ManifestProcessor.getInstance()); in MainProcessor()
62 processors.add(kp); in MainProcessor()
63 processors.add(new ZapProcessor(zapList)); in MainProcessor()
66 processors.add(new RemoveAndroidCompatAnnotationsJarTransformer(pr)); in MainProcessor()
68processors.add(new JarTransformerChain(new RemappingClassTransformer[]{ new RemappingClassTransfor… in MainProcessor()
69 processors.add(new ResourceProcessor(pr)); in MainProcessor()
70 chain = new JarProcessorChain(processors.toArray(new JarProcessor[processors.size()])); in MainProcessor()
/external/dagger2/java/dagger/hilt/processor/internal/root/
DTestRootMetadata.java24 import dagger.hilt.processor.internal.Processors;
51 return Processors.append(Processors.getEnclosedClassName(testName()), "_Application"); in appName()
56 return Processors.append(Processors.getEnclosedClassName(testName()), "_GeneratedInjector"); in testInjectorName()
66 !Processors.hasAnnotation(element, ClassNames.ANDROID_ENTRY_POINT), in of()
71 Processors.hasAnnotation(element, ClassNames.HILT_ANDROID_TEST), in of()
/external/XNNPACK/third_party/
Dcpuinfo.patch116 * Use a MIDR-based heuristic to whitelist processors known to support it:
117 - * - Processors with Qualcomm-modified Cortex-A55 cores
118 - * - Processors with Qualcomm-modified Cortex-A75 cores
119 - * - Processors with Qualcomm-modified Cortex-A76 cores
121 + * - Processors with Cortex-A55 cores
122 + * - Processors with Cortex-A65 cores
123 + * - Processors with Cortex-A75 cores
124 + * - Processors with Cortex-A76 cores
125 + * - Processors with Cortex-A77 cores
126 + * - Processors with Exynos M4 cores
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/external/llvm-project/llvm/lib/Target/ARM/
DARM.td281 // Some processors benefit from using NEON instructions for scalar
289 // On some processors, VLDn instructions that access unaligned data take one
295 // Some processors have a nonpipelined VFP coprocessor.
300 // Some processors have FP multiply-accumulate instructions that don't
334 /// processors.
351 // Some processors perform return stack prediction. CodeGen should avoid issue
357 // Some processors have no branch predictor, which changes the expected cost of
566 "Cortex-A5 ARM processors", []>;
568 "Cortex-A7 ARM processors", []>;
570 "Cortex-A8 ARM processors", []>;
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/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64.td506 // AArch64 Processors supported.
539 "Cortex-A35 ARM processors", [
548 "Cortex-A53 ARM processors", [
562 "Cortex-A55 ARM processors", [
575 "Cortex-A57 ARM processors", [
590 "Cortex-A65 ARM processors", [
603 "Cortex-A72 ARM processors", [
613 "Cortex-A73 ARM processors", [
623 "Cortex-A75 ARM processors", [
636 "Cortex-A76 ARM processors", [
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