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Searched refs:AddrIndexReg (Results 1 – 25 of 47) sorted by relevance

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/external/llvm-project/llvm/lib/Target/X86/
DX86InsertPrefetch.cpp83 Register IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg(); in IsMemOpCompatibleWithPrefetch()
218 X86::AddrIndexReg == 2 && X86::AddrDisp == 3 && in runOnMachineFunction()
229 Current->getOperand(MemOpOffset + X86::AddrIndexReg).getReg()) in runOnMachineFunction()
DX86AsmPrinter.cpp289 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); in PrintLeaMemReference()
329 PrintModifiedOperand(MI, OpNo + X86::AddrIndexReg, O, Modifier); in PrintLeaMemReference()
355 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); in PrintIntelMemReference()
383 PrintOperand(MI, OpNo + X86::AddrIndexReg, O); in PrintIntelMemReference()
DX86FixupLEAs.cpp374 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in optTwoAddrLEA()
471 MachineOperand &q = MI.getOperand(AddrOffset + X86::AddrIndexReg); in processInstruction()
506 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in processInstructionForSlowLEA()
558 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in processInstrForSlow3OpLEA()
DX86OptimizeLEAs.cpp196 &MI.getOperand(N + X86::AddrIndexReg), in getMemOpKey()
564 MI.getOperand(MemOpNo + X86::AddrIndexReg) in removeRedundantAddrCalc()
DX86InstrInfo.h116 MI.getOperand(Op + X86::AddrIndexReg).isReg() && in isLeaMem()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InsertPrefetch.cpp83 Register IndexReg = MI.getOperand(Op + X86::AddrIndexReg).getReg(); in IsMemOpCompatibleWithPrefetch()
218 X86::AddrIndexReg == 2 && X86::AddrDisp == 3 && in runOnMachineFunction()
229 Current->getOperand(MemOpOffset + X86::AddrIndexReg).getReg()) in runOnMachineFunction()
DX86AsmPrinter.cpp286 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); in PrintLeaMemReference()
326 PrintModifiedOperand(MI, OpNo + X86::AddrIndexReg, O, Modifier); in PrintLeaMemReference()
352 const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg); in PrintIntelMemReference()
380 PrintOperand(MI, OpNo + X86::AddrIndexReg, O); in PrintIntelMemReference()
DX86FixupLEAs.cpp359 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in optTwoAddrLEA()
454 MachineOperand &q = MI.getOperand(AddrOffset + X86::AddrIndexReg); in processInstruction()
488 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in processInstructionForSlowLEA()
538 const MachineOperand &Index = MI.getOperand(1 + X86::AddrIndexReg); in processInstrForSlow3OpLEA()
DX86OptimizeLEAs.cpp196 &MI.getOperand(N + X86::AddrIndexReg), in getMemOpKey()
564 MI.getOperand(MemOpNo + X86::AddrIndexReg) in removeRedundantAddrCalc()
DX86InstrInfo.h118 MI.getOperand(Op + X86::AddrIndexReg).isReg() && in isLeaMem()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp187 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in is16BitMemOperand()
206 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in is32BitMemOperand()
228 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in is64BitMemOperand()
377 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in emitMemModRMByte()
882 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
928 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
944 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
961 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
988 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
1211 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrIndexReg) << 1; // REX.X in determineREXPrefix()
[all …]
DX86ATTInstPrinter.cpp389 const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg); in printMemReference()
413 printOperand(MI, Op + X86::AddrIndexReg, O); in printMemReference()
DX86IntelInstPrinter.cpp348 const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printMemReference()
366 printOperand(MI, Op+X86::AddrIndexReg, O); in printMemReference()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp163 const MCOperand &Index = MI.getOperand(Op + X86::AddrIndexReg); in is16BitMemOperand()
183 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in is32BitMemOperand()
205 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in is64BitMemOperand()
387 const MCOperand &IndexReg = MI.getOperand(Op + X86::AddrIndexReg); in emitMemModRMByte()
904 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
951 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
967 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
984 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
1011 getX86RegEncoding(MI, MemOperand + X86::AddrIndexReg); in emitVEXOpcodePrefix()
1248 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrIndexReg) << 1; // REX.X in emitREXPrefix()
[all …]
DX86ATTInstPrinter.cpp399 const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg); in printMemReference()
423 printOperand(MI, Op + X86::AddrIndexReg, O); in printMemReference()
DX86IntelInstPrinter.cpp357 const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printMemReference()
375 printOperand(MI, Op+X86::AddrIndexReg, O); in printMemReference()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp61 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is16BitMemOperand()
207 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is32BitMemOperand()
226 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in Is64BitMemOperand()
357 const MCOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg); in emitMemModRMByte()
722 unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg); in EmitVEXOpcodePrefix()
768 unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg); in EmitVEXOpcodePrefix()
800 unsigned IndexRegEnc = getX86RegEncoding(MI, MemOperand+X86::AddrIndexReg); in EmitVEXOpcodePrefix()
997 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X in DetermineREXPrefix()
1007 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X in DetermineREXPrefix()
1017 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X in DetermineREXPrefix()
DX86BaseInfo.h35 AddrIndexReg = 2, enumerator
/external/llvm/lib/Target/X86/InstPrinter/
DX86IntelInstPrinter.cpp161 const MCOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printMemReference()
183 printOperand(MI, Op+X86::AddrIndexReg, O); in printMemReference()
DX86ATTInstPrinter.cpp198 const MCOperand &IndexReg = MI->getOperand(Op + X86::AddrIndexReg); in printMemReference()
226 printOperand(MI, Op + X86::AddrIndexReg, O); in printMemReference()
/external/llvm/lib/Target/X86/
DX86AsmPrinter.cpp232 const MachineOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printLeaMemReference()
271 printOperand(P, MI, Op+X86::AddrIndexReg, O, Modifier); in printLeaMemReference()
298 const MachineOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg); in printIntelMemReference()
320 printOperand(P, MI, Op+X86::AddrIndexReg, O, Modifier, AsmVariant); in printIntelMemReference()
DX86FixupLEAs.cpp258 LEA.getOperand(1 + X86::AddrIndexReg).getReg() == 0 && in isLEASimpleIncOrDec()
311 MachineOperand &q = MI.getOperand(AddrOffset + X86::AddrIndexReg); in processInstruction()
DX86OptimizeLEAs.cpp176 &MI.getOperand(N + X86::AddrIndexReg), in getMemOpKey()
523 MI.getOperand(MemOpNo + X86::AddrIndexReg) in removeRedundantAddrCalc()
DX86InstrInfo.h127 MI.getOperand(Op + X86::AddrIndexReg).isReg() && in isLeaMem()
DX86CallFrameOptimization.cpp389 (I->getOperand(X86::AddrIndexReg).getReg() != X86::NoRegister) || in collectCallInfo()

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