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/external/llvm-project/llvm/include/llvm/TableGen/
DDirectiveEmitter.h16 Def = DirectiveLanguages[0]; in DirectiveLanguage()
19 StringRef getName() const { return Def->getValueAsString("name"); } in getName()
22 return Def->getValueAsString("cppNamespace"); in getCppNamespace()
26 return Def->getValueAsString("directivePrefix"); in getDirectivePrefix()
30 return Def->getValueAsString("clausePrefix"); in getClausePrefix()
34 return Def->getValueAsString("includeHeader"); in getIncludeHeader()
38 return Def->getValueAsString("clauseEnumSetClass"); in getClauseEnumSetClass()
42 return Def->getValueAsString("flangClauseBaseClass"); in getFlangClauseBaseClass()
46 return Def->getValueAsBit("makeEnumAvailableInNamespace"); in hasMakeEnumAvailableInNamespace()
50 return Def->getValueAsBit("enableBitmaskEnumInNamespace"); in hasEnableBitmaskEnumInNamespace()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyLowerBrUnless.cpp77 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction() local
78 switch (Def->getOpcode()) { in runOnMachineFunction()
81 Def->setDesc(TII.get(NE_I32)); in runOnMachineFunction()
85 Def->setDesc(TII.get(EQ_I32)); in runOnMachineFunction()
89 Def->setDesc(TII.get(LE_S_I32)); in runOnMachineFunction()
93 Def->setDesc(TII.get(LT_S_I32)); in runOnMachineFunction()
97 Def->setDesc(TII.get(GE_S_I32)); in runOnMachineFunction()
101 Def->setDesc(TII.get(GT_S_I32)); in runOnMachineFunction()
105 Def->setDesc(TII.get(LE_U_I32)); in runOnMachineFunction()
109 Def->setDesc(TII.get(LT_U_I32)); in runOnMachineFunction()
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DWebAssemblyRegStackify.cpp261 static bool shouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA, in shouldRematerialize() argument
263 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def, &AA); in shouldRematerialize()
273 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in getVRegDef() local
274 return Def; in getVRegDef()
287 static bool hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, in hasOneUse() argument
296 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()); in hasOneUse()
316 static bool isSafeToMove(const MachineInstr *Def, const MachineInstr *Insert, in isSafeToMove() argument
318 assert(Def->getParent() == Insert->getParent()); in isSafeToMove()
322 if (Def->getOpcode() == WebAssembly::CATCH || in isSafeToMove()
323 Def->getOpcode() == WebAssembly::EXTRACT_EXCEPTION_I32) { in isSafeToMove()
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/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyLowerBrUnless.cpp77 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction() local
78 switch (Def->getOpcode()) { in runOnMachineFunction()
81 Def->setDesc(TII.get(NE_I32)); in runOnMachineFunction()
85 Def->setDesc(TII.get(EQ_I32)); in runOnMachineFunction()
89 Def->setDesc(TII.get(LE_S_I32)); in runOnMachineFunction()
93 Def->setDesc(TII.get(LT_S_I32)); in runOnMachineFunction()
97 Def->setDesc(TII.get(GE_S_I32)); in runOnMachineFunction()
101 Def->setDesc(TII.get(GT_S_I32)); in runOnMachineFunction()
105 Def->setDesc(TII.get(LE_U_I32)); in runOnMachineFunction()
109 Def->setDesc(TII.get(LT_U_I32)); in runOnMachineFunction()
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DWebAssemblyRegStackify.cpp263 static bool shouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA, in shouldRematerialize() argument
265 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def, &AA); in shouldRematerialize()
275 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in getVRegDef() local
276 return Def; in getVRegDef()
289 static bool hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, in hasOneUse() argument
298 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()); in hasOneUse()
318 static bool isSafeToMove(const MachineOperand *Def, const MachineOperand *Use, in isSafeToMove() argument
322 const MachineInstr *DefI = Def->getParent(); in isSafeToMove()
338 if (Def != DefI->defs().begin()) in isSafeToMove()
520 MachineInstr *Def, MachineBasicBlock &MBB, in moveForSingleUse() argument
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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyLowerBrUnless.cpp75 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction() local
76 switch (Def->getOpcode()) { in runOnMachineFunction()
78 case EQ_I32: Def->setDesc(TII.get(NE_I32)); Inverted = true; break; in runOnMachineFunction()
79 case NE_I32: Def->setDesc(TII.get(EQ_I32)); Inverted = true; break; in runOnMachineFunction()
80 case GT_S_I32: Def->setDesc(TII.get(LE_S_I32)); Inverted = true; break; in runOnMachineFunction()
81 case GE_S_I32: Def->setDesc(TII.get(LT_S_I32)); Inverted = true; break; in runOnMachineFunction()
82 case LT_S_I32: Def->setDesc(TII.get(GE_S_I32)); Inverted = true; break; in runOnMachineFunction()
83 case LE_S_I32: Def->setDesc(TII.get(GT_S_I32)); Inverted = true; break; in runOnMachineFunction()
84 case GT_U_I32: Def->setDesc(TII.get(LE_U_I32)); Inverted = true; break; in runOnMachineFunction()
85 case GE_U_I32: Def->setDesc(TII.get(LT_U_I32)); Inverted = true; break; in runOnMachineFunction()
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DWebAssemblyRegStackify.cpp219 static bool ShouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA, in ShouldRematerialize() argument
221 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def, &AA); in ShouldRematerialize()
232 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in GetVRegDef() local
233 return Def; in GetVRegDef()
246 static bool HasOneUse(unsigned Reg, MachineInstr *Def, in HasOneUse() argument
256 LIS.getInstructionIndex(*Def).getRegSlot()); in HasOneUse()
276 static bool IsSafeToMove(const MachineInstr *Def, const MachineInstr *Insert, in IsSafeToMove() argument
279 assert(Def->getParent() == Insert->getParent()); in IsSafeToMove()
282 for (const MachineOperand &MO : Def->operands()) { in IsSafeToMove()
312 (MO.isDef() || Def->definesRegister(Reg)) ? in IsSafeToMove()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUGlobalISelUtils.cpp18 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset() local
19 if (!Def) in getBaseWithConstantOffset()
22 if (Def->getOpcode() == TargetOpcode::G_CONSTANT) { in getBaseWithConstantOffset()
24 const MachineOperand &Op = Def->getOperand(1); in getBaseWithConstantOffset()
30 return std::make_tuple(Register(), Offset, Def); in getBaseWithConstantOffset()
34 if (Def->getOpcode() == TargetOpcode::G_ADD) { in getBaseWithConstantOffset()
36 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset))) in getBaseWithConstantOffset()
37 return std::make_tuple(Def->getOperand(1).getReg(), Offset, Def); in getBaseWithConstantOffset()
40 if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset)))) in getBaseWithConstantOffset()
41 return std::make_tuple(Def->getOperand(1).getReg(), Offset, Def); in getBaseWithConstantOffset()
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/external/llvm-project/libc/utils/LibcTableGenUtil/
DAPIIndexer.cpp27 static bool isa(llvm::Record *Def, llvm::Record *TypeClass) { in isa() argument
28 llvm::RecordRecTy *RecordType = Def->getType(); in isa()
38 bool APIIndexer::isaNamedType(llvm::Record *Def) { in isaNamedType() argument
39 return isa(Def, NamedTypeClass); in isaNamedType()
42 bool APIIndexer::isaStructType(llvm::Record *Def) { in isaStructType() argument
43 return isa(Def, StructClass); in isaStructType()
46 bool APIIndexer::isaPtrType(llvm::Record *Def) { in isaPtrType() argument
47 return isa(Def, PtrTypeClass); in isaPtrType()
50 bool APIIndexer::isaConstType(llvm::Record *Def) { in isaConstType() argument
51 return isa(Def, ConstTypeClass); in isaConstType()
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/external/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp294 const MachineInstr *Def; member in __anoncaae1f320111::ValueTracker
354 : Def(nullptr), DefIdx(0), DefSubReg(DefSubReg), Reg(Reg), in ValueTracker()
357 Def = MRI.getVRegDef(Reg); in ValueTracker()
373 : Def(&MI), DefIdx(DefIdx), DefSubReg(DefSubReg), in ValueTracker()
375 assert(DefIdx < Def->getDesc().getNumDefs() && in ValueTracker()
376 Def->getOperand(DefIdx).isReg() && "Invalid definition"); in ValueTracker()
377 Reg = Def->getOperand(DefIdx).getReg(); in ValueTracker()
820 TargetInstrInfo::RegSubRegPair Def, in getNewSource() argument
824 TargetInstrInfo::RegSubRegPair LookupSrc(Def.Reg, Def.SubReg); in getNewSource()
873 RewriteSource(TargetInstrInfo::RegSubRegPair Def, in RewriteSource() argument
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DMachineCopyPropagation.cpp65 bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
130 unsigned Def, const TargetRegisterInfo *TRI) { in isNopCopy() argument
134 assert(Def == PreviousDef); in isNopCopy()
140 return SubIdx == TRI->getSubRegIndex(PreviousDef, Def); in isNopCopy()
147 unsigned Def) { in eraseIfRedundant() argument
150 if (MRI->isReserved(Src) || MRI->isReserved(Def)) in eraseIfRedundant()
154 Reg2MIMap::iterator CI = AvailCopyMap.find(Def); in eraseIfRedundant()
160 if (!isNopCopy(PrevCopy, Src, Def, TRI)) in eraseIfRedundant()
169 assert(CopyDef == Src || CopyDef == Def); in eraseIfRedundant()
188 unsigned Def = MI->getOperand(0).getReg(); in CopyPropagateBlock() local
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/external/llvm-project/clang-tools-extra/clang-tidy/readability/
DConstReturnTypeCheck.cpp28 findConstToRemove(const FunctionDecl *Def, in findConstToRemove() argument
30 if (!Def->getReturnType().isLocalConstQualified()) in findConstToRemove()
37 SourceLocation NameBeginLoc = Def->getQualifier() in findConstToRemove()
38 ? Def->getQualifierLoc().getBeginLoc() in findConstToRemove()
39 : Def->getLocation(); in findConstToRemove()
44 CharSourceRange::getCharRange(Def->getBeginLoc(), NameBeginLoc), in findConstToRemove()
70 static CheckResult checkDef(const clang::FunctionDecl *Def, in checkDef() argument
73 llvm::Optional<Token> Tok = findConstToRemove(Def, MatchResult); in checkDef()
84 for (const FunctionDecl *Decl = Def->getPreviousDecl(); Decl != nullptr; in checkDef()
105 const auto *Def = Result.Nodes.getNodeAs<FunctionDecl>("func"); in check() local
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DStaticDefinitionInAnonymousNamespaceCheck.cpp32 const auto *Def = Result.Nodes.getNodeAs<NamedDecl>("static-def"); in check() local
34 if (Def->getLocation().isMacroID()) in check()
38 const DeclContext *DC = Def->getDeclContext(); in check()
43 diag(Def->getLocation(), "%0 is a static definition in " in check()
45 << Def; in check()
47 SourceLocation Loc = Def->getSourceRange().getBegin(); in check()
48 while (Loc < Def->getSourceRange().getEnd() && in check()
/external/llvm-project/llvm/utils/TableGen/
DExegesisEmitter.cpp52 void emitPfmCountersInfo(const Record &Def,
74 for (Record *Def : Records.getAllDerivedDefinitions("ProcPfmCounters")) { in collectPfmCounters()
78 Def->getValueAsListOfDefs("IssueCounters")) { in collectPfmCounters()
88 AddPfmCounterName(Def->getValueAsDef("CycleCounter")); in collectPfmCounters()
89 AddPfmCounterName(Def->getValueAsDef("UopsCounter")); in collectPfmCounters()
107 void ExegesisEmitter::emitPfmCountersInfo(const Record &Def, in emitPfmCountersInfo() argument
111 Def.getValueAsDef("CycleCounter")->getValueAsString("Counter"); in emitPfmCountersInfo()
113 Def.getValueAsDef("UopsCounter")->getValueAsString("Counter"); in emitPfmCountersInfo()
115 Def.getValueAsListOfDefs("IssueCounters").size(); in emitPfmCountersInfo()
117 OS << "\nstatic const PfmCountersInfo " << Target << Def.getName() in emitPfmCountersInfo()
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/external/llvm-project/llvm/lib/WindowsManifest/
DWindowsManifestMerger.cpp127 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in search() local
128 if (Def->prefix && xmlStringsEqual(Def->href, HRef)) { in search()
129 return Def; in search()
155 if (xmlNsPtr Def = search(HRef, Node)) in searchOrDefine() local
156 return Def; in searchOrDefine()
157 if (xmlNsPtr Def = xmlNewNs(Node, HRef, getPrefixForHref(HRef))) in searchOrDefine() local
158 return Def; in searchOrDefine()
182 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in getNamespaceWithPrefix() local
183 if (xmlStringsEqual(Def->prefix, Prefix)) { in getNamespaceWithPrefix()
184 return Def; in getNamespaceWithPrefix()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/WindowsManifest/
DWindowsManifestMerger.cpp127 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in search() local
128 if (Def->prefix && xmlStringsEqual(Def->href, HRef)) { in search()
129 return Def; in search()
155 if (xmlNsPtr Def = search(HRef, Node)) in searchOrDefine() local
156 return Def; in searchOrDefine()
157 if (xmlNsPtr Def = xmlNewNs(Node, HRef, getPrefixForHref(HRef))) in searchOrDefine() local
158 return Def; in searchOrDefine()
182 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in getNamespaceWithPrefix() local
183 if (xmlStringsEqual(Def->prefix, Prefix)) { in getNamespaceWithPrefix()
184 return Def; in getNamespaceWithPrefix()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp255 RegSubRegPair Def, RewriteMapTy &RewriteMap);
367 const MachineInstr *Def = nullptr; member in __anon1dd0dc540111::ValueTracker
423 Def = MRI.getVRegDef(Reg); in ValueTracker()
1113 RegSubRegPair Def, in getNewSource() argument
1116 RegSubRegPair LookupSrc(Def.Reg, Def.SubReg); in getNewSource()
1224 RegSubRegPair Def, RewriteMapTy &RewriteMap) { in rewriteSource() argument
1225 assert(!Register::isPhysicalRegister(Def.Reg) && in rewriteSource()
1229 RegSubRegPair NewSrc = getNewSource(MRI, TII, Def, RewriteMap); in rewriteSource()
1232 const TargetRegisterClass *DefRC = MRI->getRegClass(Def.Reg); in rewriteSource()
1240 if (Def.SubReg) { in rewriteSource()
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/external/llvm-project/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp258 RegSubRegPair Def, RewriteMapTy &RewriteMap);
370 const MachineInstr *Def = nullptr; member in __anond9421e600111::ValueTracker
426 Def = MRI.getVRegDef(Reg); in ValueTracker()
1118 RegSubRegPair Def, in getNewSource() argument
1121 RegSubRegPair LookupSrc(Def.Reg, Def.SubReg); in getNewSource()
1229 RegSubRegPair Def, RewriteMapTy &RewriteMap) { in rewriteSource() argument
1230 assert(!Register::isPhysicalRegister(Def.Reg) && in rewriteSource()
1234 RegSubRegPair NewSrc = getNewSource(MRI, TII, Def, RewriteMap); in rewriteSource()
1237 const TargetRegisterClass *DefRC = MRI->getRegClass(Def.Reg); in rewriteSource()
1245 if (Def.SubReg) { in rewriteSource()
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DReachingDefAnalysis.cpp162 int Def = Incoming[Unit]; in reprocessBasicBlock() local
163 if (Def == ReachingDefDefaultVal) in reprocessBasicBlock()
168 if (*Start >= Def) in reprocessBasicBlock()
172 *Start = Def; in reprocessBasicBlock()
175 MBBReachingDefs[MBBNumber][Unit].insert(Start, Def); in reprocessBasicBlock()
180 if (MBBOutRegsInfos[MBBNumber][Unit] < Def - NumInsts) in reprocessBasicBlock()
181 MBBOutRegsInfos[MBBNumber][Unit] = Def - NumInsts; in reprocessBasicBlock()
247 for (int Def : RegUnitDefs) { in traverse() local
248 assert(Def > LastDef && "Defs must be sorted and unique"); in traverse()
249 LastDef = Def; in traverse()
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DMachineCopyPropagation.cpp157 MCRegister Def = MI->getOperand(0).getReg().asMCReg(); in trackCopy() local
161 for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI) in trackCopy()
169 if (!is_contained(Copy.DefRegs, Def)) in trackCopy()
170 Copy.DefRegs.push_back(Def); in trackCopy()
281 bool eraseIfRedundant(MachineInstr &Copy, MCRegister Src, MCRegister Def);
291 const MachineOperand &MODef, Register Def);
337 MCRegister Def, const TargetRegisterInfo *TRI) { in isNopCopy() argument
340 if (Src == PreviousSrc && Def == PreviousDef) in isNopCopy()
345 return SubIdx == TRI->getSubRegIndex(PreviousDef, Def); in isNopCopy()
352 MCRegister Src, MCRegister Def) { in eraseIfRedundant() argument
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/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUGlobalISelUtils.cpp18 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset() local
19 if (!Def) in getBaseWithConstantOffset()
22 if (Def->getOpcode() == TargetOpcode::G_CONSTANT) { in getBaseWithConstantOffset()
24 const MachineOperand &Op = Def->getOperand(1); in getBaseWithConstantOffset()
34 if (Def->getOpcode() == TargetOpcode::G_ADD) { in getBaseWithConstantOffset()
36 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset))) in getBaseWithConstantOffset()
37 return std::make_pair(Def->getOperand(1).getReg(), Offset); in getBaseWithConstantOffset()
40 if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset)))) in getBaseWithConstantOffset()
41 return std::make_pair(Def->getOperand(1).getReg(), Offset); in getBaseWithConstantOffset()
/external/llvm-project/clang/lib/Format/
DMacroExpander.cpp61 Def.Name = Current->TokenText; in parse()
64 Def.ObjectLike = false; in parse()
71 return Def; in parse()
79 Def.Params.push_back(Current); in parseParams()
80 Def.ArgMap[Def.Params.back()->TokenText] = Def.Params.size() - 1; in parseParams()
103 Def.Body.push_back(Current); in parseTail()
106 Def.Body.push_back(Current); in parseTail()
118 Definition Def; member in clang::format::MacroExpander::DefinitionParser
162 const Definition &Def = Definitions.find(ID->TokenText)->second; in expand() local
181 auto I = Def.ArgMap.find(Tok->TokenText); in expand()
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/external/llvm/lib/Target/AArch64/
DAArch64CollectLOH.cpp501 static bool canDefBePartOfLOH(const MachineInstr *Def) { in canDefBePartOfLOH() argument
502 unsigned Opc = Def->getOpcode(); in canDefBePartOfLOH()
511 switch (Def->getOperand(2).getType()) { in canDefBePartOfLOH()
522 switch (Def->getOperand(2).getType()) { in canDefBePartOfLOH()
578 const MachineInstr *Def = DefsIt.first; in reachedUsesToDefs() local
582 if ((ADRPMode && Def->getOpcode() != AArch64::ADRP) || in reachedUsesToDefs()
583 (!ADRPMode && !canDefBePartOfLOH(Def)) || in reachedUsesToDefs()
701 const MachineInstr *Def = *UseToDefs.find(Instr)->second.begin(); in isCandidate() local
702 if (Def->getOpcode() != AArch64::ADRP) { in isCandidate()
709 if (!MDT->dominates(Def, Instr)) in isCandidate()
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/external/llvm/lib/IR/
DDominators.cpp75 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
78 const BasicBlock *DefBB = Def->getParent(); in dominates()
89 if (Def == User) in dominates()
96 if (isa<InvokeInst>(Def) || isa<PHINode>(User)) in dominates()
97 return dominates(Def, UseBB); in dominates()
104 for (; &*I != Def && &*I != User; ++I) in dominates()
107 return &*I == Def; in dominates()
112 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
114 const BasicBlock *DefBB = Def->getParent(); in dominates()
129 if (const auto *II = dyn_cast<InvokeInst>(Def)) { in dominates()
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/external/llvm-project/llvm/lib/IR/
DDominators.cpp120 const Instruction *Def = dyn_cast<Instruction>(DefV); in dominates() local
121 if (!Def) { in dominates()
128 const BasicBlock *DefBB = Def->getParent(); in dominates()
139 if (Def == User) in dominates()
146 if (isa<InvokeInst>(Def) || isa<CallBrInst>(Def) || isa<PHINode>(User)) in dominates()
147 return dominates(Def, UseBB); in dominates()
152 return Def->comesBefore(User); in dominates()
157 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
159 const BasicBlock *DefBB = Def->getParent(); in dominates()
174 if (const auto *II = dyn_cast<InvokeInst>(Def)) { in dominates()
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