| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 392 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const;
935 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs() argument
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| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 1125 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceInputs()
1130 return getRegSequenceLikeInputs(MI, DefIdx, InputRegs); in getRegSequenceInputs()
1142 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(), in getRegSequenceInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 1215 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceInputs()
1220 return getRegSequenceLikeInputs(MI, DefIdx, InputRegs); in getRegSequenceInputs()
1234 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(), in getRegSequenceInputs()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 1288 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceInputs()
1293 return getRegSequenceLikeInputs(MI, DefIdx, InputRegs); in getRegSequenceInputs()
1307 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(), in getRegSequenceInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 496 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const;
1146 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs() argument
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 503 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const;
1169 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs() argument
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 56 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
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| D | ARMBaseInstrInfo.cpp | 4597 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
4609 InputRegs.push_back( in getRegSequenceLikeInputs()
4613 InputRegs.push_back( in getRegSequenceLikeInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 60 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
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| D | ARMBaseInstrInfo.cpp | 5246 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
5259 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
5264 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 62 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
|
| D | ARMBaseInstrInfo.cpp | 5282 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
5295 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
5300 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 969 AMDGPUFunctionArgInfo::PreloadedValue InputRegs[] = { in passSpecialInputs() local
985 for (auto InputID : InputRegs) { in passSpecialInputs()
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| D | SIISelLowering.cpp | 2682 AMDGPUFunctionArgInfo::PreloadedValue InputRegs[] = { in passSpecialInputs() local
2692 for (auto InputID : InputRegs) { in passSpecialInputs()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 3872 SmallVector<SrcOp, 4> InputRegs(NumOps, Register()); in reduceOperationWidth() local
3895 InputRegs[J] = ExtractedRegs[J][I]; in reduceOperationWidth()
3897 auto Inst = MIRBuilder.buildInstr(Opc, {NarrowDstTy}, InputRegs, Flags); in reduceOperationWidth()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2466 AMDGPUFunctionArgInfo::PreloadedValue InputRegs[] = { in passSpecialInputs() local
2477 for (auto InputID : InputRegs) { in passSpecialInputs()
|