| /external/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 1780 TargetInstrInfo::RegSubRegPairAndIdx InsertedReg; in getNextSourceFromInsertSubreg() local
1781 if (!TII->getInsertSubregInputs(*Def, DefIdx, BaseReg, InsertedReg)) in getNextSourceFromInsertSubreg()
1791 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1792 return ValueTrackerResult(InsertedReg.Reg, InsertedReg.SubReg); in getNextSourceFromInsertSubreg()
1810 TRI->getSubRegIndexLaneMask(InsertedReg.SubIdx)) != 0) in getNextSourceFromInsertSubreg()
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| D | TargetInstrInfo.cpp | 1173 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregInputs()
1178 return getInsertSubregLikeInputs(MI, DefIdx, BaseReg, InsertedReg); in getInsertSubregInputs()
1191 InsertedReg.Reg = MOInsertedReg.getReg(); in getInsertSubregInputs()
1192 InsertedReg.SubReg = MOInsertedReg.getSubReg(); in getInsertSubregInputs()
1193 InsertedReg.SubIdx = (unsigned)MOSubIdx.getImm(); in getInsertSubregInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 1939 RegSubRegPairAndIdx InsertedReg; in getNextSourceFromInsertSubreg() local
1940 if (!TII->getInsertSubregInputs(*Def, DefIdx, BaseReg, InsertedReg)) in getNextSourceFromInsertSubreg()
1950 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1951 return ValueTrackerResult(InsertedReg.Reg, InsertedReg.SubReg); in getNextSourceFromInsertSubreg()
1969 TRI->getSubRegIndexLaneMask(InsertedReg.SubIdx)).none()) in getNextSourceFromInsertSubreg()
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| D | TargetInstrInfo.cpp | 1267 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregInputs()
1272 return getInsertSubregLikeInputs(MI, DefIdx, BaseReg, InsertedReg); in getInsertSubregInputs()
1287 InsertedReg.Reg = MOInsertedReg.getReg(); in getInsertSubregInputs()
1288 InsertedReg.SubReg = MOInsertedReg.getSubReg(); in getInsertSubregInputs()
1289 InsertedReg.SubIdx = (unsigned)MOSubIdx.getImm(); in getInsertSubregInputs()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 1939 RegSubRegPairAndIdx InsertedReg; in getNextSourceFromInsertSubreg() local
1940 if (!TII->getInsertSubregInputs(*Def, DefIdx, BaseReg, InsertedReg)) in getNextSourceFromInsertSubreg()
1950 if (InsertedReg.SubIdx == DefSubReg) { in getNextSourceFromInsertSubreg()
1951 return ValueTrackerResult(InsertedReg.Reg, InsertedReg.SubReg); in getNextSourceFromInsertSubreg()
1969 TRI->getSubRegIndexLaneMask(InsertedReg.SubIdx)).none()) in getNextSourceFromInsertSubreg()
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| D | TargetInstrInfo.cpp | 1340 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregInputs()
1345 return getInsertSubregLikeInputs(MI, DefIdx, BaseReg, InsertedReg); in getInsertSubregInputs()
1360 InsertedReg.Reg = MOInsertedReg.getReg(); in getInsertSubregInputs()
1361 InsertedReg.SubReg = MOInsertedReg.getSubReg(); in getInsertSubregInputs()
1362 InsertedReg.SubIdx = (unsigned)MOSubIdx.getImm(); in getInsertSubregInputs()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 431 RegSubRegPairAndIdx &InsertedReg) const;
964 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs() argument
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 535 RegSubRegPairAndIdx &InsertedReg) const;
1175 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs() argument
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 542 RegSubRegPairAndIdx &InsertedReg) const;
1198 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs() argument
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 86 RegSubRegPairAndIdx &InsertedReg) const override;
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| D | ARMBaseInstrInfo.cpp | 4643 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
4656 InsertedReg.Reg = MOInsertedReg.getReg(); in getInsertSubregLikeInputs()
4657 InsertedReg.SubReg = MOInsertedReg.getSubReg(); in getInsertSubregLikeInputs()
4658 InsertedReg.SubIdx = MOIndex.getImm() == 0 ? ARM::ssub_0 : ARM::ssub_1; in getInsertSubregLikeInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 90 RegSubRegPairAndIdx &InsertedReg) const override;
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| D | ARMBaseInstrInfo.cpp | 5296 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
5311 InsertedReg.Reg = MOInsertedReg.getReg(); in getInsertSubregLikeInputs()
5312 InsertedReg.SubReg = MOInsertedReg.getSubReg(); in getInsertSubregLikeInputs()
5313 InsertedReg.SubIdx = MOIndex.getImm() == 0 ? ARM::ssub_0 : ARM::ssub_1; in getInsertSubregLikeInputs()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 92 RegSubRegPairAndIdx &InsertedReg) const override;
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| D | ARMBaseInstrInfo.cpp | 5332 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
5347 InsertedReg.Reg = MOInsertedReg.getReg(); in getInsertSubregLikeInputs()
5348 InsertedReg.SubReg = MOInsertedReg.getSubReg(); in getInsertSubregLikeInputs()
5349 InsertedReg.SubIdx = MOIndex.getImm() == 0 ? ARM::ssub_0 : ARM::ssub_1; in getInsertSubregLikeInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/ |
| D | DwarfDebug.cpp | 566 bool InsertedReg = ForwardedRegWorklist.insert(ArgReg.Reg).second; in collectCallSiteParameters() local
567 assert(InsertedReg && "Single register used to forward two arguments?"); in collectCallSiteParameters()
568 (void)InsertedReg; in collectCallSiteParameters()
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| /external/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| D | DwarfDebug.cpp | 783 bool InsertedReg = in collectCallSiteParameters() local
786 assert(InsertedReg && "Single register used to forward two arguments?"); in collectCallSiteParameters()
787 (void)InsertedReg; in collectCallSiteParameters()
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