/external/llvm-project/llvm/lib/Target/X86/ |
D | X86InstrControl.td | 236 def CALL16m : I<0xFF, MRM2m, (outs), (ins i16mem:$dst), 244 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst), 256 def CALL16m_NT : I<0xFF, MRM2m, (outs), (ins i16mem : $dst), 263 def CALL32m_NT : I<0xFF, MRM2m, (outs), (ins i32mem : $dst), 342 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst), 352 def CALL64m_NT : I<0xFF, MRM2m, (outs), (ins i64mem : $dst),
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D | X86InstrShiftRotate.td | 395 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst), 397 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, u8imm:$cnt), 399 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst), 401 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, u8imm:$cnt), 403 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst), 405 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, u8imm:$cnt), 407 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst), 409 def RCL64mi : RIi8<0xC1, MRM2m, (outs), (ins i64mem:$dst, u8imm:$cnt), 433 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst), 435 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst), [all …]
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D | X86InstrKL.td | 78 def AESENCWIDE256KL : I<0xD8, MRM2m, (outs), (ins opaquemem:$src),
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D | X86InstrFPStack.td | 380 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">; 383 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">; 386 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">; 389 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">; 561 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst">; 562 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst">; 566 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst">; 567 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst">;
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D | X86Instr3DNow.td | 102 def PREFETCHWT1 : I<0x0D, MRM2m, (outs), (ins i8mem:$addr), "prefetchwt1\t$addr",
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D | X86InstrSystem.td | 395 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 397 def LGDT32m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 399 def LGDT64m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 410 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86InstrControl.td | 234 def CALL16m : I<0xFF, MRM2m, (outs), (ins i16mem:$dst), 242 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst), 254 def CALL16m_NT : I<0xFF, MRM2m, (outs), (ins i16mem : $dst), 261 def CALL32m_NT : I<0xFF, MRM2m, (outs), (ins i32mem : $dst), 338 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst), 348 def CALL64m_NT : I<0xFF, MRM2m, (outs), (ins i64mem : $dst),
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D | X86InstrShiftRotate.td | 395 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst), 397 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, u8imm:$cnt), 399 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst), 401 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, u8imm:$cnt), 403 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst), 405 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, u8imm:$cnt), 407 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst), 409 def RCL64mi : RIi8<0xC1, MRM2m, (outs), (ins i64mem:$dst, u8imm:$cnt), 433 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst), 435 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst), [all …]
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D | X86InstrFPStack.td | 385 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">; 388 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">; 391 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">; 394 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">; 559 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst">; 560 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst">; 564 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst">; 565 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst">;
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D | X86Instr3DNow.td | 102 def PREFETCHWT1 : I<0x0D, MRM2m, (outs), (ins i8mem:$addr), "prefetchwt1\t$addr",
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D | X86InstrSystem.td | 385 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 387 def LGDT32m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 389 def LGDT64m : I<0x01, MRM2m, (outs), (ins opaquemem:$src), 400 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
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/external/llvm/lib/Target/X86/ |
D | X86InstrShiftRotate.td | 412 def RCL8m1 : I<0xD0, MRM2m, (outs), (ins i8mem:$dst), 414 def RCL8mi : Ii8<0xC0, MRM2m, (outs), (ins i8mem:$dst, u8imm:$cnt), 416 def RCL16m1 : I<0xD1, MRM2m, (outs), (ins i16mem:$dst), 418 def RCL16mi : Ii8<0xC1, MRM2m, (outs), (ins i16mem:$dst, u8imm:$cnt), 420 def RCL32m1 : I<0xD1, MRM2m, (outs), (ins i32mem:$dst), 422 def RCL32mi : Ii8<0xC1, MRM2m, (outs), (ins i32mem:$dst, u8imm:$cnt), 424 def RCL64m1 : RI<0xD1, MRM2m, (outs), (ins i64mem:$dst), 426 def RCL64mi : RIi8<0xC1, MRM2m, (outs), (ins i64mem:$dst, u8imm:$cnt), 447 def RCL8mCL : I<0xD2, MRM2m, (outs), (ins i8mem:$dst), 449 def RCL16mCL : I<0xD3, MRM2m, (outs), (ins i16mem:$dst), [all …]
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D | X86InstrFPStack.td | 325 def FCOM32m : FPI<0xD8, MRM2m, (outs), (ins f32mem:$src), "fcom{s}\t$src">; 331 def FICOM32m : FPI<0xDA, MRM2m, (outs), (ins i32mem:$src), "ficom{l}\t$src">; 334 def FCOM64m : FPI<0xDC, MRM2m, (outs), (ins f64mem:$src), "fcom{l}\t$src">; 341 def FICOM16m : FPI<0xDE, MRM2m, (outs), (ins i16mem:$src), "ficom{s}\t$src">; 484 def ST_F32m : FPI<0xD9, MRM2m, (outs), (ins f32mem:$dst), "fst{s}\t$dst", 486 def ST_F64m : FPI<0xDD, MRM2m, (outs), (ins f64mem:$dst), "fst{l}\t$dst", 494 def IST_F16m : FPI<0xDF, MRM2m, (outs), (ins i16mem:$dst), "fist{s}\t$dst", 496 def IST_F32m : FPI<0xDB, MRM2m, (outs), (ins i32mem:$dst), "fist{l}\t$dst",
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D | X86InstrControl.td | 207 def CALL16m : I<0xFF, MRM2m, (outs), (ins i16mem:$dst), 215 def CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst), 287 def CALL64m : I<0xFF, MRM2m, (outs), (ins i64mem:$dst),
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D | X86InstrSystem.td | 418 def LGDT16m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), 420 def LGDT32m : I<0x01, MRM2m, (outs), (ins opaque48mem:$src), 422 def LGDT64m : I<0x01, MRM2m, (outs), (ins opaque80mem:$src), 432 def LLDT16m : I<0x00, MRM2m, (outs), (ins i16mem:$src),
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86BaseInfo.h | 299 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, // Format /0 /1 /2 /3 enumerator 692 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
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D | X86MCCodeEmitter.cpp | 783 case X86II::MRM2m: case X86II::MRM3m: in EmitVEXOpcodePrefix() 1013 case X86II::MRM2m: case X86II::MRM3m: in DetermineREXPrefix() 1372 case X86II::MRM2m: case X86II::MRM3m: in encodeInstruction()
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/external/llvm-project/llvm/utils/TableGen/ |
D | X86RecognizableInstr.h | 115 MRM0m = 32, MRM1m = 33, MRM2m = 34, MRM3m = 35, enumerator
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86BaseInfo.h | 626 MRM0m = 40, MRM1m = 41, MRM2m = 42, MRM3m = 43, // Format /0 /1 /2 /3 enumerator 1063 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
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D | X86MCCodeEmitter.cpp | 967 case X86II::MRM2m: in emitVEXOpcodePrefix() 1228 case X86II::MRM2m: in determineREXPrefix() 1660 case X86II::MRM2m: in encodeInstruction()
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/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
D | X86BaseInfo.h | 677 MRM0m = 32, MRM1m = 33, MRM2m = 34, MRM3m = 35, // Format /0 /1 /2 /3 enumerator 1141 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
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D | X86MCCodeEmitter.cpp | 990 case X86II::MRM2m: in emitVEXOpcodePrefix() 1265 case X86II::MRM2m: in emitREXPrefix() 1685 case X86II::MRM2m: in encodeInstruction()
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/external/llvm/utils/TableGen/ |
D | X86RecognizableInstr.cpp | 110 MRM0m = 24, MRM1m = 25, MRM2m = 26, MRM3m = 27, enumerator 742 case X86Local::MRM2m: in emitInstructionSpecifier() 859 case X86Local::MRM2m: case X86Local::MRM3m: in emitDecodePath()
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/external/llvm-project/llvm/test/TableGen/ |
D | TargetInstrInfo.td | 55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
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/external/llvm/test/TableGen/ |
D | TargetInstrInfo.td | 55 def MRM0m : Format<24>; def MRM1m : Format<25>; def MRM2m : Format<26>;
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