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Searched refs:MRM4m (Results 1 – 25 of 42) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86InstrControl.td138 def JMP16m : I<0xFF, MRM4m, (outs), (ins i16mem:$dst), "jmp{w}\t{*}$dst",
145 def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l}\t{*}$dst",
152 def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q}\t{*}$dst",
263 def TAILJMPm : I<0xFF, MRM4m, (outs), (ins i32mem_TC:$dst),
314 def TAILJMPm64 : I<0xFF, MRM4m, (outs), (ins i64mem_TC:$dst),
326 def TAILJMPm64_REX : I<0xFF, MRM4m, (outs), (ins i64mem_TC:$dst),
DX86InstrShiftRotate.td73 def SHL8mCL : I<0xD2, MRM4m, (outs), (ins i8mem :$dst),
76 def SHL16mCL : I<0xD3, MRM4m, (outs), (ins i16mem:$dst),
80 def SHL32mCL : I<0xD3, MRM4m, (outs), (ins i32mem:$dst),
84 def SHL64mCL : RI<0xD3, MRM4m, (outs), (ins i64mem:$dst),
88 def SHL8mi : Ii8<0xC0, MRM4m, (outs), (ins i8mem :$dst, u8imm:$src),
92 def SHL16mi : Ii8<0xC1, MRM4m, (outs), (ins i16mem:$dst, u8imm:$src),
96 def SHL32mi : Ii8<0xC1, MRM4m, (outs), (ins i32mem:$dst, u8imm:$src),
100 def SHL64mi : RIi8<0xC1, MRM4m, (outs), (ins i64mem:$dst, u8imm:$src),
106 def SHL8m1 : I<0xD0, MRM4m, (outs), (ins i8mem :$dst),
110 def SHL16m1 : I<0xD1, MRM4m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrSystem.td380 def VERRm : I<0x00, MRM4m, (outs), (ins i16mem:$seg),
457 def SMSW16m : I<0x01, MRM4m, (outs), (ins i16mem:$dst),
489 def XSAVE : I<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
492 def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaque512mem:$dst),
511 def XSAVEC : I<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),
514 def XSAVEC64 : RI<0xC7, MRM4m, (outs), (ins opaque512mem:$dst),
DX86InstrFPStack.td245 defm SUB : FPBinary<fsub, MRM4m, "sub">;
328 def FLDENVm : FPI<0xD9, MRM4m, (outs), (ins f32mem:$src), "fldenv\t$src">;
337 def FRSTORm : FPI<0xDD, MRM4m, (outs), (ins f32mem:$dst), "frstor\t$dst">;
344 def FBLDm : FPI<0xDF, MRM4m, (outs), (ins f80mem:$src), "fbld\t$src">;
DX86InstrArithmetic.td86 def MUL8m : I<0xF6, MRM4m, (outs), (ins i8mem :$src),
96 def MUL16m : I<0xF7, MRM4m, (outs), (ins i16mem:$src),
101 def MUL32m : I<0xF7, MRM4m, (outs), (ins i32mem:$src),
106 def MUL64m : RI<0xF7, MRM4m, (outs), (ins i64mem:$src),
1191 defm AND : ArithBinOp_RF<0x20, 0x22, 0x24, "and", MRM4r, MRM4m,
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrControl.td130 def JMP16m : I<0xFF, MRM4m, (outs), (ins i16mem:$dst), "jmp{w}\t{*}$dst",
137 def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l}\t{*}$dst",
144 def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q}\t{*}$dst",
154 def JMP64m_REX : I<0xFF, MRM4m, (outs), (ins i64mem:$dst),
165 def JMP16m_NT : I<0xFF, MRM4m, (outs), (ins i16mem : $dst), "jmp{w}\t{*}$dst",
173 def JMP32m_NT : I<0xFF, MRM4m, (outs), (ins i32mem : $dst), "jmp{l}\t{*}$dst",
181 def JMP64m_NT : I<0xFF, MRM4m, (outs), (ins i64mem : $dst), "jmp{q}\t{*}$dst",
DX86InstrShiftRotate.td69 def SHL8mCL : I<0xD2, MRM4m, (outs), (ins i8mem :$dst),
72 def SHL16mCL : I<0xD3, MRM4m, (outs), (ins i16mem:$dst),
76 def SHL32mCL : I<0xD3, MRM4m, (outs), (ins i32mem:$dst),
80 def SHL64mCL : RI<0xD3, MRM4m, (outs), (ins i64mem:$dst),
87 def SHL8mi : Ii8<0xC0, MRM4m, (outs), (ins i8mem :$dst, u8imm:$src),
90 def SHL16mi : Ii8<0xC1, MRM4m, (outs), (ins i16mem:$dst, u8imm:$src),
94 def SHL32mi : Ii8<0xC1, MRM4m, (outs), (ins i32mem:$dst, u8imm:$src),
98 def SHL64mi : RIi8<0xC1, MRM4m, (outs), (ins i64mem:$dst, u8imm:$src),
104 def SHL8m1 : I<0xD0, MRM4m, (outs), (ins i8mem :$dst),
107 def SHL16m1 : I<0xD1, MRM4m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrSystem.td361 def VERRm : I<0x00, MRM4m, (outs), (ins i16mem:$seg), "verr\t$seg", []>, TB, NotMemoryFoldable;
434 def SMSW16m : I<0x01, MRM4m, (outs), (ins i16mem:$dst),
535 def XSAVE : I<0xAE, MRM4m, (outs), (ins opaquemem:$dst),
538 def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaquemem:$dst),
553 def XSAVEC : I<0xC7, MRM4m, (outs), (ins opaquemem:$dst),
556 def XSAVEC64 : RI<0xC7, MRM4m, (outs), (ins opaquemem:$dst),
712 def PTWRITEm: I<0xAE, MRM4m, (outs), (ins i32mem:$dst),
715 def PTWRITE64m : RI<0xAE, MRM4m, (outs), (ins i64mem:$dst),
DX86InstrFPStack.td292 defm SUB : FPBinary<any_fsub, MRM4m, "sub">;
395 def FLDENVm : FPI<0xD9, MRM4m, (outs), (ins anymem:$src), "fldenv\t$src">;
396 def FRSTORm : FPI<0xDD, MRM4m, (outs), (ins anymem:$src), "frstor\t$src">;
408 def FBLDm : FPI<0xDF, MRM4m, (outs), (ins f80mem:$src), "fbld\t$src">;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrControl.td130 def JMP16m : I<0xFF, MRM4m, (outs), (ins i16mem:$dst), "jmp{w}\t{*}$dst",
137 def JMP32m : I<0xFF, MRM4m, (outs), (ins i32mem:$dst), "jmp{l}\t{*}$dst",
144 def JMP64m : I<0xFF, MRM4m, (outs), (ins i64mem:$dst), "jmp{q}\t{*}$dst",
154 def JMP64m_REX : I<0xFF, MRM4m, (outs), (ins i64mem:$dst),
165 def JMP16m_NT : I<0xFF, MRM4m, (outs), (ins i16mem : $dst), "jmp{w}\t{*}$dst",
173 def JMP32m_NT : I<0xFF, MRM4m, (outs), (ins i32mem : $dst), "jmp{l}\t{*}$dst",
181 def JMP64m_NT : I<0xFF, MRM4m, (outs), (ins i64mem : $dst), "jmp{q}\t{*}$dst",
DX86InstrShiftRotate.td69 def SHL8mCL : I<0xD2, MRM4m, (outs), (ins i8mem :$dst),
72 def SHL16mCL : I<0xD3, MRM4m, (outs), (ins i16mem:$dst),
76 def SHL32mCL : I<0xD3, MRM4m, (outs), (ins i32mem:$dst),
80 def SHL64mCL : RI<0xD3, MRM4m, (outs), (ins i64mem:$dst),
87 def SHL8mi : Ii8<0xC0, MRM4m, (outs), (ins i8mem :$dst, u8imm:$src),
90 def SHL16mi : Ii8<0xC1, MRM4m, (outs), (ins i16mem:$dst, u8imm:$src),
94 def SHL32mi : Ii8<0xC1, MRM4m, (outs), (ins i32mem:$dst, u8imm:$src),
98 def SHL64mi : RIi8<0xC1, MRM4m, (outs), (ins i64mem:$dst, u8imm:$src),
104 def SHL8m1 : I<0xD0, MRM4m, (outs), (ins i8mem :$dst),
107 def SHL16m1 : I<0xD1, MRM4m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrSystem.td351 def VERRm : I<0x00, MRM4m, (outs), (ins i16mem:$seg), "verr\t$seg", []>, TB, NotMemoryFoldable;
424 def SMSW16m : I<0x01, MRM4m, (outs), (ins i16mem:$dst),
525 def XSAVE : I<0xAE, MRM4m, (outs), (ins opaquemem:$dst),
528 def XSAVE64 : RI<0xAE, MRM4m, (outs), (ins opaquemem:$dst),
543 def XSAVEC : I<0xC7, MRM4m, (outs), (ins opaquemem:$dst),
546 def XSAVEC64 : RI<0xC7, MRM4m, (outs), (ins opaquemem:$dst),
702 def PTWRITEm: I<0xAE, MRM4m, (outs), (ins i32mem:$dst),
705 def PTWRITE64m : RI<0xAE, MRM4m, (outs), (ins i64mem:$dst),
DX86InstrFPStack.td298 defm SUB : FPBinary<any_fsub, MRM4m, "sub">;
400 def FLDENVm : FPI<0xD9, MRM4m, (outs), (ins f32mem:$src), "fldenv\t$src">;
401 def FRSTORm : FPI<0xDD, MRM4m, (outs), (ins f32mem:$dst), "frstor\t$dst">;
412 def FBLDm : FPI<0xDF, MRM4m, (outs), (ins f80mem:$src), "fbld\t$src">;
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h300 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, // Format /4 /5 /6 /7 enumerator
693 case X86II::MRM4m: case X86II::MRM5m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp784 case X86II::MRM4m: case X86II::MRM5m: in EmitVEXOpcodePrefix()
1014 case X86II::MRM4m: case X86II::MRM5m: in DetermineREXPrefix()
1373 case X86II::MRM4m: case X86II::MRM5m: in encodeInstruction()
/external/llvm-project/llvm/utils/TableGen/
DX86RecognizableInstr.h116 MRM4m = 36, MRM5m = 37, MRM6m = 38, MRM7m = 39, enumerator
DX86RecognizableInstr.cpp689 case X86Local::MRM4m: in emitInstructionSpecifier()
811 case X86Local::MRM4m: case X86Local::MRM5m: in emitDecodePath()
DX86FoldTablesEmitter.cpp433 (MemFormNum == X86Local::MRM4m && RegFormNum == X86Local::MRM4r) || in areOppositeForms()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h627 MRM4m = 44, MRM5m = 45, MRM6m = 46, MRM7m = 47, // Format /4 /5 /6 /7 enumerator
1064 case X86II::MRM4m: case X86II::MRM5m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp969 case X86II::MRM4m: in emitVEXOpcodePrefix()
1230 case X86II::MRM4m: in determineREXPrefix()
1662 case X86II::MRM4m: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h678 MRM4m = 36, MRM5m = 37, MRM6m = 38, MRM7m = 39, // Format /4 /5 /6 /7 enumerator
1142 case X86II::MRM4m: case X86II::MRM5m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp992 case X86II::MRM4m: in emitVEXOpcodePrefix()
1267 case X86II::MRM4m: in emitREXPrefix()
1687 case X86II::MRM4m: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp111 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, enumerator
744 case X86Local::MRM4m: in emitInstructionSpecifier()
860 case X86Local::MRM4m: case X86Local::MRM5m: in emitDecodePath()
/external/llvm-project/llvm/test/TableGen/
DTargetInstrInfo.td56 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
/external/llvm/test/TableGen/
DTargetInstrInfo.td56 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;

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