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Searched refs:MRM5m (Results 1 – 25 of 42) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrShiftRotate.td169 def SHR8mCL : I<0xD2, MRM5m, (outs), (ins i8mem :$dst),
172 def SHR16mCL : I<0xD3, MRM5m, (outs), (ins i16mem:$dst),
176 def SHR32mCL : I<0xD3, MRM5m, (outs), (ins i32mem:$dst),
180 def SHR64mCL : RI<0xD3, MRM5m, (outs), (ins i64mem:$dst),
187 def SHR8mi : Ii8<0xC0, MRM5m, (outs), (ins i8mem :$dst, u8imm:$src),
190 def SHR16mi : Ii8<0xC1, MRM5m, (outs), (ins i16mem:$dst, u8imm:$src),
194 def SHR32mi : Ii8<0xC1, MRM5m, (outs), (ins i32mem:$dst, u8imm:$src),
198 def SHR64mi : RIi8<0xC1, MRM5m, (outs), (ins i64mem:$dst, u8imm:$src),
204 def SHR8m1 : I<0xD0, MRM5m, (outs), (ins i8mem :$dst),
207 def SHR16m1 : I<0xD1, MRM5m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrSystem.td352 def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg), "verw\t$seg", []>, TB, NotMemoryFoldable;
474 def RSTORSSP : I<0x01, MRM5m, (outs), (ins i32mem:$src),
531 def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaquemem:$dst),
534 def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaquemem:$dst),
549 def XSAVES : I<0xC7, MRM5m, (outs), (ins opaquemem:$dst),
552 def XSAVES64 : RI<0xC7, MRM5m, (outs), (ins opaquemem:$dst),
DX86InstrControl.td196 def FARJMP64 : RI<0xFF, MRM5m, (outs), (ins opaquemem:$dst),
200 def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaquemem:$dst),
202 def FARJMP32m : I<0xFF, MRM5m, (outs), (ins opaquemem:$dst),
DX86InstrFPStack.td299 defm SUBR: FPBinary<any_fsub ,MRM5m, "subr", 0>;
551 def LD_F80m : FPI<0xDB, MRM5m, (outs), (ins f80mem:$src), "fld{t}\t$src">;
555 def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll}\t$src">;
711 def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td173 def SHR8mCL : I<0xD2, MRM5m, (outs), (ins i8mem :$dst),
176 def SHR16mCL : I<0xD3, MRM5m, (outs), (ins i16mem:$dst),
180 def SHR32mCL : I<0xD3, MRM5m, (outs), (ins i32mem:$dst),
184 def SHR64mCL : RI<0xD3, MRM5m, (outs), (ins i64mem:$dst),
188 def SHR8mi : Ii8<0xC0, MRM5m, (outs), (ins i8mem :$dst, u8imm:$src),
192 def SHR16mi : Ii8<0xC1, MRM5m, (outs), (ins i16mem:$dst, u8imm:$src),
196 def SHR32mi : Ii8<0xC1, MRM5m, (outs), (ins i32mem:$dst, u8imm:$src),
200 def SHR64mi : RIi8<0xC1, MRM5m, (outs), (ins i64mem:$dst, u8imm:$src),
206 def SHR8m1 : I<0xD0, MRM5m, (outs), (ins i8mem :$dst),
210 def SHR16m1 : I<0xD1, MRM5m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrControl.td166 def FARJMP64 : RI<0xFF, MRM5m, (outs), (ins opaque80mem:$dst),
170 def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaque32mem:$dst),
173 def FARJMP32m : I<0xFF, MRM5m, (outs), (ins opaque48mem:$dst),
DX86InstrSystem.td384 def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg),
495 def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
498 def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
519 def XSAVES : I<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),
522 def XSAVES64 : RI<0xC7, MRM5m, (outs), (ins opaque512mem:$dst),
DX86InstrFPStack.td246 defm SUBR: FPBinary<fsub ,MRM5m, "subr", 0>;
474 def LD_F80m : FPI<0xDB, MRM5m, (outs), (ins f80mem:$src), "fld{t}\t$src",
480 def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll}\t$src",
624 def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
DX86InstrArithmetic.td131 def IMUL8m : I<0xF6, MRM5m, (outs), (ins i8mem :$src),
135 def IMUL16m : I<0xF7, MRM5m, (outs), (ins i16mem:$src),
140 def IMUL32m : I<0xF7, MRM5m, (outs), (ins i32mem:$src),
145 def IMUL64m : RI<0xF7, MRM5m, (outs), (ins i64mem:$src),
1200 defm SUB : ArithBinOp_RF<0x28, 0x2A, 0x2C, "sub", MRM5r, MRM5m,
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h300 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, // Format /4 /5 /6 /7 enumerator
693 case X86II::MRM4m: case X86II::MRM5m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp784 case X86II::MRM4m: case X86II::MRM5m: in EmitVEXOpcodePrefix()
1014 case X86II::MRM4m: case X86II::MRM5m: in DetermineREXPrefix()
1373 case X86II::MRM4m: case X86II::MRM5m: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrShiftRotate.td169 def SHR8mCL : I<0xD2, MRM5m, (outs), (ins i8mem :$dst),
172 def SHR16mCL : I<0xD3, MRM5m, (outs), (ins i16mem:$dst),
176 def SHR32mCL : I<0xD3, MRM5m, (outs), (ins i32mem:$dst),
180 def SHR64mCL : RI<0xD3, MRM5m, (outs), (ins i64mem:$dst),
187 def SHR8mi : Ii8<0xC0, MRM5m, (outs), (ins i8mem :$dst, u8imm:$src),
190 def SHR16mi : Ii8<0xC1, MRM5m, (outs), (ins i16mem:$dst, u8imm:$src),
194 def SHR32mi : Ii8<0xC1, MRM5m, (outs), (ins i32mem:$dst, u8imm:$src),
198 def SHR64mi : RIi8<0xC1, MRM5m, (outs), (ins i64mem:$dst, u8imm:$src),
204 def SHR8m1 : I<0xD0, MRM5m, (outs), (ins i8mem :$dst),
207 def SHR16m1 : I<0xD1, MRM5m, (outs), (ins i16mem:$dst),
[all …]
DX86InstrSystem.td362 def VERWm : I<0x00, MRM5m, (outs), (ins i16mem:$seg), "verw\t$seg", []>, TB, NotMemoryFoldable;
484 def RSTORSSP : I<0x01, MRM5m, (outs), (ins i32mem:$src),
541 def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaquemem:$dst),
544 def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaquemem:$dst),
559 def XSAVES : I<0xC7, MRM5m, (outs), (ins opaquemem:$dst),
562 def XSAVES64 : RI<0xC7, MRM5m, (outs), (ins opaquemem:$dst),
DX86InstrControl.td197 def FARJMP64m : RI<0xFF, MRM5m, (outs), (ins opaquemem:$dst),
201 def FARJMP16m : I<0xFF, MRM5m, (outs), (ins opaquemem:$dst),
203 def FARJMP32m : I<0xFF, MRM5m, (outs), (ins opaquemem:$dst),
DX86InstrFPStack.td293 defm SUBR: FPBinary<any_fsub ,MRM5m, "subr", 0>;
553 def LD_F80m : FPI<0xDB, MRM5m, (outs), (ins f80mem:$src), "fld{t}\t$src">;
557 def ILD_F64m : FPI<0xDF, MRM5m, (outs), (ins i64mem:$src), "fild{ll}\t$src">;
707 def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
/external/llvm-project/llvm/utils/TableGen/
DX86RecognizableInstr.h116 MRM4m = 36, MRM5m = 37, MRM6m = 38, MRM7m = 39, enumerator
DX86RecognizableInstr.cpp690 case X86Local::MRM5m: in emitInstructionSpecifier()
811 case X86Local::MRM4m: case X86Local::MRM5m: in emitDecodePath()
DX86FoldTablesEmitter.cpp434 (MemFormNum == X86Local::MRM5m && RegFormNum == X86Local::MRM5r) || in areOppositeForms()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h627 MRM4m = 44, MRM5m = 45, MRM6m = 46, MRM7m = 47, // Format /4 /5 /6 /7 enumerator
1064 case X86II::MRM4m: case X86II::MRM5m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp970 case X86II::MRM5m: in emitVEXOpcodePrefix()
1231 case X86II::MRM5m: in determineREXPrefix()
1663 case X86II::MRM5m: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h678 MRM4m = 36, MRM5m = 37, MRM6m = 38, MRM7m = 39, // Format /4 /5 /6 /7 enumerator
1142 case X86II::MRM4m: case X86II::MRM5m: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp993 case X86II::MRM5m: in emitVEXOpcodePrefix()
1268 case X86II::MRM5m: in emitREXPrefix()
1688 case X86II::MRM5m: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp111 MRM4m = 28, MRM5m = 29, MRM6m = 30, MRM7m = 31, enumerator
745 case X86Local::MRM5m: in emitInstructionSpecifier()
860 case X86Local::MRM4m: case X86Local::MRM5m: in emitDecodePath()
/external/llvm-project/llvm/test/TableGen/
DTargetInstrInfo.td56 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;
/external/llvm/test/TableGen/
DTargetInstrInfo.td56 def MRM3m : Format<27>; def MRM4m : Format<28>; def MRM5m : Format<29>;

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