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Searched refs:Masked (Results 1 – 25 of 83) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DCaymanInstructions.td115 let DST_SEL_Y = 7; // Masked
116 let DST_SEL_Z = 7; // Masked
117 let DST_SEL_W = 7; // Masked
125 let DST_SEL_Y = 7; // Masked
126 let DST_SEL_Z = 7; // Masked
127 let DST_SEL_W = 7; // Masked
137 let DST_SEL_Y = 7; // Masked
138 let DST_SEL_Z = 7; // Masked
139 let DST_SEL_W = 7; // Masked
DEvergreenInstructions.td181 let DST_SEL_Y = 7; // Masked
182 let DST_SEL_Z = 7; // Masked
183 let DST_SEL_W = 7; // Masked
192 let DST_SEL_Y = 7; // Masked
193 let DST_SEL_Z = 7; // Masked
194 let DST_SEL_W = 7; // Masked
205 let DST_SEL_Y = 7; // Masked
206 let DST_SEL_Z = 7; // Masked
207 let DST_SEL_W = 7; // Masked
/external/llvm-project/llvm/lib/Target/AMDGPU/
DCaymanInstructions.td116 let DST_SEL_Y = 7; // Masked
117 let DST_SEL_Z = 7; // Masked
118 let DST_SEL_W = 7; // Masked
126 let DST_SEL_Y = 7; // Masked
127 let DST_SEL_Z = 7; // Masked
128 let DST_SEL_W = 7; // Masked
138 let DST_SEL_Y = 7; // Masked
139 let DST_SEL_Z = 7; // Masked
140 let DST_SEL_W = 7; // Masked
DEvergreenInstructions.td190 let DST_SEL_Y = 7; // Masked
191 let DST_SEL_Z = 7; // Masked
192 let DST_SEL_W = 7; // Masked
201 let DST_SEL_Y = 7; // Masked
202 let DST_SEL_Z = 7; // Masked
203 let DST_SEL_W = 7; // Masked
214 let DST_SEL_Y = 7; // Masked
215 let DST_SEL_Z = 7; // Masked
216 let DST_SEL_W = 7; // Masked
/external/llvm/lib/Target/AMDGPU/
DCaymanInstructions.td113 let DST_SEL_Y = 7; // Masked
114 let DST_SEL_Z = 7; // Masked
115 let DST_SEL_W = 7; // Masked
123 let DST_SEL_Y = 7; // Masked
124 let DST_SEL_Z = 7; // Masked
125 let DST_SEL_W = 7; // Masked
135 let DST_SEL_Y = 7; // Masked
136 let DST_SEL_Z = 7; // Masked
137 let DST_SEL_W = 7; // Masked
DEvergreenInstructions.td141 let DST_SEL_Y = 7; // Masked
142 let DST_SEL_Z = 7; // Masked
143 let DST_SEL_W = 7; // Masked
152 let DST_SEL_Y = 7; // Masked
153 let DST_SEL_Z = 7; // Masked
154 let DST_SEL_W = 7; // Masked
165 let DST_SEL_Y = 7; // Masked
166 let DST_SEL_Z = 7; // Masked
167 let DST_SEL_W = 7; // Masked
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/
DInstCombineShifts.cpp184 Value *Masked, *ShiftShAmt; in dropRedundantMaskingOfLeftShiftInput() local
186 m_Shift(m_Value(Masked), m_ZExtOrSelf(m_Value(ShiftShAmt)))); in dropRedundantMaskingOfLeftShiftInput()
191 if (match(Masked, m_CombineAnd(m_Trunc(m_Value(Masked)), m_Value(Trunc))) && in dropRedundantMaskingOfLeftShiftInput()
196 Type *WidestTy = Masked->getType(); in dropRedundantMaskingOfLeftShiftInput()
218 if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) { in dropRedundantMaskingOfLeftShiftInput()
248 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X))) || in dropRedundantMaskingOfLeftShiftInput()
249 match(Masked, m_Shr(m_Shl(m_Value(X), m_Value(MaskShAmt)), in dropRedundantMaskingOfLeftShiftInput()
296 if (!Masked->hasOneUse()) in dropRedundantMaskingOfLeftShiftInput()
299 if (match(Masked, m_AShr(m_Value(), m_Value()))) in dropRedundantMaskingOfLeftShiftInput()
/external/llvm-project/llvm/lib/Transforms/InstCombine/
DInstCombineShifts.cpp185 Value *Masked, *ShiftShAmt; in dropRedundantMaskingOfLeftShiftInput() local
187 m_Shift(m_Value(Masked), m_ZExtOrSelf(m_Value(ShiftShAmt)))); in dropRedundantMaskingOfLeftShiftInput()
192 if (match(Masked, m_CombineAnd(m_Trunc(m_Value(Masked)), m_Value(Trunc))) && in dropRedundantMaskingOfLeftShiftInput()
197 Type *WidestTy = Masked->getType(); in dropRedundantMaskingOfLeftShiftInput()
219 if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) { in dropRedundantMaskingOfLeftShiftInput()
249 } else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X))) || in dropRedundantMaskingOfLeftShiftInput()
250 match(Masked, m_Shr(m_Shl(m_Value(X), m_Value(MaskShAmt)), in dropRedundantMaskingOfLeftShiftInput()
297 if (!Masked->hasOneUse()) in dropRedundantMaskingOfLeftShiftInput()
300 if (match(Masked, m_AShr(m_Value(), m_Value()))) in dropRedundantMaskingOfLeftShiftInput()
/external/llvm-project/llvm/lib/Support/
DAPFixedPoint.cpp38 APInt Masked(NewVal & Mask); in convert() local
41 if (!(Masked == Mask || Masked == 0)) { in convert()
/external/swiftshader/third_party/subzero/src/
DWasmTranslator.cpp483 auto *Masked = makeVariable(DestTy); in Binop() local
487 InstArithmetic::create(Func, InstArithmetic::And, Masked, Right, in Binop()
490 InstArithmetic::create(Func, InstArithmetic::Shl, Top, Left, Masked)); in Binop()
494 Ctx->getConstantInt(DestTy, BitCount), Masked)); in Binop()
509 auto *Masked = makeVariable(DestTy); in Binop() local
513 InstArithmetic::create(Func, InstArithmetic::And, Masked, Right, in Binop()
516 Top, Left, Masked)); in Binop()
520 Ctx->getConstantInt(DestTy, BitCount), Masked)); in Binop()
/external/llvm-project/mlir/integration_test/Dialect/Vector/CPU/
Dtest-maskedload.mlir41 // Masked load tests.
Dtest-maskedstore.mlir59 // Masked store tests.
/external/deqp/doc/testspecs/GLES2/
Dfunctional.stencil.txt29 + Masked stencil comparison
/external/llvm-project/llvm/lib/CodeGen/
DTypePromotion.cpp668 Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask); in ConvertTruncs() local
670 if (auto *I = dyn_cast<Instruction>(Masked)) in ConvertTruncs()
673 ReplaceAllUsersOfWith(Trunc, Masked); in ConvertTruncs()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTypePromotion.cpp666 Value *Masked = Builder.CreateAnd(Trunc->getOperand(0), Mask); in ConvertTruncs() local
668 if (auto *I = dyn_cast<Instruction>(Masked)) in ConvertTruncs()
671 ReplaceAllUsersOfWith(Trunc, Masked); in ConvertTruncs()
/external/llvm-project/llvm/test/CodeGen/AArch64/
DO0-pipeline.ll25 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
Dsve-masked-ldst-trunc.ll8 ; Masked Stores
Dsve-masked-ldst-sext.ll8 ; Masked Loads
Dsve-masked-ldst-zext.ll8 ; Masked Loads
/external/llvm-project/llvm/test/MC/Disassembler/Hexagon/
Dxtype_bit.txt78 # Masked parity
/external/llvm/test/MC/Disassembler/Hexagon/
Dxtype_bit.txt78 # Masked parity
/external/llvm-project/mlir/include/mlir/Dialect/AVX512/
DAVX512.td40 let summary = "Masked roundscale op";
/external/llvm-project/llvm/lib/Transforms/Instrumentation/
DMemProfiler.cpp427 if (auto *Masked = dyn_cast<ConstantInt>(Vector->getOperand(Idx))) { in instrumentMaskedLoadOrStore() local
428 if (Masked->isZero()) in instrumentMaskedLoadOrStore()
/external/llvm-project/llvm/test/CodeGen/X86/
DO0-pipeline.ll27 ; CHECK-NEXT: Scalarize Masked Memory Intrinsics
/external/llvm-project/mlir/include/mlir/Dialect/LLVMIR/
DLLVMOps.td1034 /// Create a call to Masked Load intrinsic.
1048 /// Create a call to Masked Store intrinsic.
1060 /// Create a call to Masked Gather intrinsic.
1074 /// Create a call to Masked Scatter intrinsic.
1086 /// Create a call to Masked Expand Load intrinsic.
1091 /// Create a call to Masked Compress Store intrinsic.

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