| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 366 struct RegSubRegPairAndIdx : RegSubRegPair { struct
368 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, argument
392 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const; argument
410 RegSubRegPairAndIdx &InputReg) const;
431 RegSubRegPairAndIdx &InsertedReg) const;
935 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
949 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs()
964 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 468 struct RegSubRegPairAndIdx : RegSubRegPair { struct
471 RegSubRegPairAndIdx(unsigned Reg = 0, unsigned SubReg = 0, argument
496 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const; argument
514 RegSubRegPairAndIdx &InputReg) const;
535 RegSubRegPairAndIdx &InsertedReg) const;
1146 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
1160 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs()
1175 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
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| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 475 struct RegSubRegPairAndIdx : RegSubRegPair { struct
478 RegSubRegPairAndIdx(Register Reg = Register(), unsigned SubReg = 0, argument
503 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const; argument
521 RegSubRegPairAndIdx &InputReg) const;
542 RegSubRegPairAndIdx &InsertedReg) const;
1169 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
1183 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs()
1198 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 56 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
69 RegSubRegPairAndIdx &InputReg) const override;
86 RegSubRegPairAndIdx &InsertedReg) const override;
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| D | ARMBaseInstrInfo.cpp | 4597 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
4610 RegSubRegPairAndIdx(MOReg->getReg(), MOReg->getSubReg(), ARM::ssub_0)); in getRegSequenceLikeInputs()
4614 RegSubRegPairAndIdx(MOReg->getReg(), MOReg->getSubReg(), ARM::ssub_1)); in getRegSequenceLikeInputs()
4622 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs()
4643 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 60 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
73 RegSubRegPairAndIdx &InputReg) const override;
90 RegSubRegPairAndIdx &InsertedReg) const override;
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| D | ARMBaseInstrInfo.cpp | 5246 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
5259 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
5264 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
5273 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs()
5296 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 102 using RegSubRegPairAndIdx = TargetInstrInfo::RegSubRegPairAndIdx; typedef
1905 SmallVector<RegSubRegPairAndIdx, 8> RegSeqInputRegs; in getNextSourceFromRegSequence()
1912 for (const RegSubRegPairAndIdx &RegSeqInput : RegSeqInputRegs) { in getNextSourceFromRegSequence()
1939 RegSubRegPairAndIdx InsertedReg; in getNextSourceFromInsertSubreg()
1992 RegSubRegPairAndIdx ExtractSubregInputReg; in getNextSourceFromExtractSubreg()
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| D | TargetInstrInfo.cpp | 1215 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceInputs()
1234 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(), in getRegSequenceInputs()
1242 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregInputs()
1267 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregInputs()
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 102 using RegSubRegPairAndIdx = TargetInstrInfo::RegSubRegPairAndIdx; typedef
1905 SmallVector<RegSubRegPairAndIdx, 8> RegSeqInputRegs; in getNextSourceFromRegSequence()
1912 for (const RegSubRegPairAndIdx &RegSeqInput : RegSeqInputRegs) { in getNextSourceFromRegSequence()
1939 RegSubRegPairAndIdx InsertedReg; in getNextSourceFromInsertSubreg()
1992 RegSubRegPairAndIdx ExtractSubregInputReg; in getNextSourceFromExtractSubreg()
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| D | TargetInstrInfo.cpp | 1288 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceInputs()
1307 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(), in getRegSequenceInputs()
1315 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregInputs()
1340 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregInputs()
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 62 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const override;
75 RegSubRegPairAndIdx &InputReg) const override;
92 RegSubRegPairAndIdx &InsertedReg) const override;
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| D | ARMBaseInstrInfo.cpp | 5282 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceLikeInputs()
5295 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
5300 InputRegs.push_back(RegSubRegPairAndIdx(MOReg->getReg(), in getRegSequenceLikeInputs()
5309 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregLikeInputs()
5332 RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregLikeInputs()
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| /external/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 1125 SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const { in getRegSequenceInputs()
1142 InputRegs.push_back(RegSubRegPairAndIdx(MOReg.getReg(), MOReg.getSubReg(), in getRegSequenceInputs()
1150 RegSubRegPairAndIdx &InputReg) const { in getExtractSubregInputs()
1173 RegSubRegPair &BaseReg, RegSubRegPairAndIdx &InsertedReg) const { in getInsertSubregInputs()
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| D | PeepholeOptimizer.cpp | 1741 SmallVector<TargetInstrInfo::RegSubRegPairAndIdx, 8> RegSeqInputRegs; in getNextSourceFromRegSequence()
1780 TargetInstrInfo::RegSubRegPairAndIdx InsertedReg; in getNextSourceFromInsertSubreg()
1833 TargetInstrInfo::RegSubRegPairAndIdx ExtractSubregInputReg; in getNextSourceFromExtractSubreg()
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| /external/llvm/lib/Target/Hexagon/ |
| D | RDFCopy.cpp | 60 SmallVector<TargetInstrInfo::RegSubRegPairAndIdx,2> Inputs; in interpretAsCopy()
|