| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | divrem.ll | 3 ; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | divrem.ll | 3 ; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 204 SDIVREM, UDIVREM, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 211 SDIVREM, UDIVREM, enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 248 SDIVREM, enumerator
|
| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 158 setOperationAction(ISD::SDIVREM, MVT::i8, Custom); in AVRTargetLowering()
159 setOperationAction(ISD::SDIVREM, MVT::i16, Custom); in AVRTargetLowering()
160 setOperationAction(ISD::SDIVREM, MVT::i32, Custom); in AVRTargetLowering()
346 assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) && in LowerDivRem()
348 bool IsSigned = (Opcode == ISD::SDIVREM); in LowerDivRem()
704 case ISD::SDIVREM: in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 156 setOperationAction(ISD::SDIVREM, VT, Custom); in AVRTargetLowering()
341 assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) && in LowerDivRem()
343 bool IsSigned = (Opcode == ISD::SDIVREM); in LowerDivRem()
705 case ISD::SDIVREM: in LowerOperation()
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 94 SDIVREM, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 93 SDIVREM, enumerator
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 186 case ISD::SDIVREM: return "sdivrem"; in getOperationName()
|
| D | LegalizeVectorOps.cpp | 269 case ISD::SDIVREM: in LegalizeOp()
|
| D | LegalizeIntegerTypes.cpp | 2302 if (TLI.getOperationAction(ISD::SDIVREM, VT) == TargetLowering::Custom) { in ExpandIntRes_SDIV()
2303 SDValue Res = DAG.getNode(ISD::SDIVREM, dl, DAG.getVTList(VT, VT), Ops); in ExpandIntRes_SDIV()
2487 if (TLI.getOperationAction(ISD::SDIVREM, VT) == TargetLowering::Custom) { in ExpandIntRes_SREM()
2488 SDValue Res = DAG.getNode(ISD::SDIVREM, dl, DAG.getVTList(VT, VT), Ops); in ExpandIntRes_SREM()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 80 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); in BPFTargetLowering()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 98 ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, in WebAssemblyTargetLowering()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 150 setOperationAction(ISD::SDIVREM, MVT::i8, Expand); in MSP430TargetLowering()
156 setOperationAction(ISD::SDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 129 setOperationAction(ISD::SDIVREM, MVT::i64, Custom); in MipsSETargetLowering()
136 setOperationAction(ISD::SDIVREM, MVT::i32, Custom); in MipsSETargetLowering()
166 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
213 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); in MipsSETargetLowering()
370 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG); in LowerOperation()
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 198 setOperationAction(ISD::SDIVREM, MVT::i64, Custom); in MipsSETargetLowering()
205 setOperationAction(ISD::SDIVREM, MVT::i32, Custom); in MipsSETargetLowering()
238 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
285 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); in MipsSETargetLowering()
459 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG); in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 198 setOperationAction(ISD::SDIVREM, MVT::i64, Custom); in MipsSETargetLowering()
205 setOperationAction(ISD::SDIVREM, MVT::i32, Custom); in MipsSETargetLowering()
238 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
285 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); in MipsSETargetLowering()
459 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG); in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 86 setOperationAction(ISD::SDIVREM, VT, Expand); in BPFTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 236 case ISD::SDIVREM: return "sdivrem"; in getOperationName()
|
| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 85 setOperationAction(ISD::SDIVREM, VT, Expand); in BPFTargetLowering()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 240 case ISD::SDIVREM: return "sdivrem"; in getOperationName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 137 setOperationAction(ISD::SDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
143 setOperationAction(ISD::SDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 136 setOperationAction(ISD::SDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
142 setOperationAction(ISD::SDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 300 setOperationAction(ISD::SDIVREM, VT, Custom); in AMDGPUTargetLowering()
385 setOperationAction(ISD::SDIVREM, VT, Custom); in AMDGPUTargetLowering()
711 case ISD::SDIVREM: return LowerSDIVREM(Op, DAG); in LowerOperation()
1551 SDValue DIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerSDIVREM()
|