| /external/llvm-project/llvm/test/TableGen/ |
| D | dag-isel-res-order.td | 14 // CHECK-LABEL: OPC_CheckOpcode, TARGET_VAL(ISD::UDIVREM)
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | divrem.ll | 3 ; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | divrem.ll | 3 ; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 204 SDIVREM, UDIVREM, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 211 SDIVREM, UDIVREM, enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 249 UDIVREM, enumerator
|
| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 155 setOperationAction(ISD::UDIVREM, MVT::i8, Custom); in AVRTargetLowering()
156 setOperationAction(ISD::UDIVREM, MVT::i16, Custom); in AVRTargetLowering()
157 setOperationAction(ISD::UDIVREM, MVT::i32, Custom); in AVRTargetLowering()
346 assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) && in LowerDivRem()
705 case ISD::UDIVREM: in LowerOperation()
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 95 UDIVREM, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 94 UDIVREM, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 155 setOperationAction(ISD::UDIVREM, VT, Custom); in AVRTargetLowering()
341 assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) && in LowerDivRem()
706 case ISD::UDIVREM: in LowerOperation()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 187 case ISD::UDIVREM: return "udivrem"; in getOperationName()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 81 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in BPFTargetLowering()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 98 ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, in WebAssemblyTargetLowering()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 147 setOperationAction(ISD::UDIVREM, MVT::i8, Expand); in MSP430TargetLowering()
153 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 130 setOperationAction(ISD::UDIVREM, MVT::i64, Custom); in MipsSETargetLowering()
137 setOperationAction(ISD::UDIVREM, MVT::i32, Custom); in MipsSETargetLowering()
167 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
214 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in MipsSETargetLowering()
371 case ISD::UDIVREM: return lowerMulDiv(Op, MipsISD::DivRemU, true, true, in LowerOperation()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 301 setOperationAction(ISD::UDIVREM, VT, Custom); in AMDGPUTargetLowering()
386 setOperationAction(ISD::UDIVREM, VT, Expand); in AMDGPUTargetLowering()
710 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG); in LowerOperation()
1359 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerUDIVREM64()
1571 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS); in LowerSDIVREM()
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 199 setOperationAction(ISD::UDIVREM, MVT::i64, Custom); in MipsSETargetLowering()
206 setOperationAction(ISD::UDIVREM, MVT::i32, Custom); in MipsSETargetLowering()
239 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
286 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in MipsSETargetLowering()
460 case ISD::UDIVREM: return lowerMulDiv(Op, MipsISD::DivRemU, true, true, in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 199 setOperationAction(ISD::UDIVREM, MVT::i64, Custom); in MipsSETargetLowering()
206 setOperationAction(ISD::UDIVREM, MVT::i32, Custom); in MipsSETargetLowering()
239 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in MipsSETargetLowering()
286 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in MipsSETargetLowering()
460 case ISD::UDIVREM: return lowerMulDiv(Op, MipsISD::DivRemU, true, true, in LowerOperation()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 87 setOperationAction(ISD::UDIVREM, VT, Expand); in BPFTargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 237 case ISD::UDIVREM: return "udivrem"; in getOperationName()
|
| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 86 setOperationAction(ISD::UDIVREM, VT, Expand); in BPFTargetLowering()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 241 case ISD::UDIVREM: return "udivrem"; in getOperationName()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 134 setOperationAction(ISD::UDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
140 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm-project/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 133 setOperationAction(ISD::UDIVREM, MVT::i8, Promote); in MSP430TargetLowering()
139 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 315 setOperationAction(ISD::UDIVREM, VT, Custom); in AMDGPUTargetLowering()
385 setOperationAction(ISD::UDIVREM, VT, Expand); in AMDGPUTargetLowering()
1133 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG); in LowerOperation()
1660 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerUDIVREM64()
2007 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS); in LowerSDIVREM()
|