| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| D | ir3_const.h | 118 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_user_consts() local
119 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_emit_user_consts()
164 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_ubos() local
165 uint32_t offset = const_state->offsets.ubo; in ir3_emit_ubos()
174 uint32_t params = const_state->num_ubos; in ir3_emit_ubos()
214 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_emit_ssbo_sizes() local
215 uint32_t offset = const_state->offsets.ssbo_sizes; in ir3_emit_ssbo_sizes()
217 uint32_t sizes[align(const_state->ssbo_size.count, 4)]; in ir3_emit_ssbo_sizes()
218 unsigned mask = const_state->ssbo_size.mask; in ir3_emit_ssbo_sizes()
222 unsigned off = const_state->ssbo_size.off[index]; in ir3_emit_ssbo_sizes()
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| D | ir3_cmdline.c | 425 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in main()
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| /external/mesa3d/src/freedreno/ir3/ |
| D | ir3_disk_cache.c | 133 blob_copy_bytes(blob, v->const_state, sizeof(*v->const_state)); in retrieve_variant()
134 unsigned immeds_sz = v->const_state->immediates_size * in retrieve_variant()
135 sizeof(v->const_state->immediates[0]); in retrieve_variant()
136 v->const_state->immediates = ralloc_size(v->const_state, immeds_sz); in retrieve_variant()
137 blob_copy_bytes(blob, v->const_state->immediates, immeds_sz); in retrieve_variant()
153 blob_write_bytes(blob, v->const_state, sizeof(*v->const_state)); in store_variant()
154 unsigned immeds_sz = v->const_state->immediates_size * in store_variant()
155 sizeof(v->const_state->immediates[0]); in store_variant()
156 blob_write_bytes(blob, v->const_state->immediates, immeds_sz); in store_variant()
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| D | ir3_nir.c | 632 struct ir3_const_state *const_state) in ir3_setup_const_state() argument
636 memset(&const_state->offsets, ~0, sizeof(const_state->offsets)); in ir3_setup_const_state()
638 ir3_nir_scan_driver_consts(nir, const_state); in ir3_setup_const_state()
642 const_state->num_driver_params = in ir3_setup_const_state()
643 MAX2(const_state->num_driver_params, IR3_DP_VTXCNT_MAX + 1); in ir3_setup_const_state()
646 const_state->num_ubos = nir->info.num_ubos; in ir3_setup_const_state()
649 const_state->num_driver_params = align(const_state->num_driver_params, 4); in ir3_setup_const_state()
651 debug_assert((const_state->ubo_state.size % 16) == 0); in ir3_setup_const_state()
652 unsigned constoff = const_state->ubo_state.size / 16; in ir3_setup_const_state()
655 if (const_state->num_ubos > 0) { in ir3_setup_const_state()
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| D | ir3_cp.c | 201 struct ir3_const_state *const_state = ir3_const_state(ctx->so); in lower_immed() local
202 if (const_state->immediates_count == const_state->immediates_size) { in lower_immed()
203 const_state->immediates = rerzalloc(const_state, in lower_immed()
204 const_state->immediates, in lower_immed()
205 __typeof__(const_state->immediates[0]), in lower_immed()
206 const_state->immediates_size, in lower_immed()
207 const_state->immediates_size + 4); in lower_immed()
208 const_state->immediates_size += 4; in lower_immed()
210 for (int i = const_state->immediates_count; i < const_state->immediates_size; i++) in lower_immed()
211 const_state->immediates[i] = 0xd0d0d0d0; in lower_immed()
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| D | ir3_assembler.c | 45 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in ir3_parse_asm()
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| D | ir3_parser.y | 156 struct ir3_const_state *const_state = ir3_const_state(variant); in add_const() local
159 if (const_state->immediates_count == const_state->immediates_size) { in add_const()
160 const_state->immediates = rerzalloc(const_state, in add_const()
161 const_state->immediates, in add_const()
162 __typeof__(const_state->immediates[0]), in add_const()
163 const_state->immediates_size, in add_const()
164 const_state->immediates_size + 4); in add_const()
165 const_state->immediates_size += 4; in add_const()
167 const_state->immediates[idx * 4 + 0] = c0; in add_const()
168 const_state->immediates[idx * 4 + 1] = c1; in add_const()
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| D | ir3_shader.c | 219 v->const_state = rzalloc_size(v, sizeof(*v->const_state)); in alloc_variant()
576 const struct ir3_const_state *const_state = ir3_const_state(so); in ir3_shader_disasm() local
577 for (i = 0; i < DIV_ROUND_UP(const_state->immediates_count, 4); i++) { in ir3_shader_disasm()
578 fprintf(out, "@const(c%d.x)\t", const_state->offsets.immediate + i); in ir3_shader_disasm()
580 const_state->immediates[i * 4 + 0], in ir3_shader_disasm()
581 const_state->immediates[i * 4 + 1], in ir3_shader_disasm()
582 const_state->immediates[i * 4 + 2], in ir3_shader_disasm()
583 const_state->immediates[i * 4 + 3]); in ir3_shader_disasm()
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| D | ir3_a4xx.c | 215 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in get_image_offset() local
216 unsigned cb = regid(const_state->offsets.image_dims, 0) + in get_image_offset()
217 const_state->image_dims.off[index]; in get_image_offset()
219 debug_assert(const_state->image_dims.mask & (1 << index)); in get_image_offset()
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| D | ir3_nir_analyze_ubo_ranges.c | 366 struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_analyze_ubo_ranges() local
367 struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_nir_analyze_ubo_ranges()
427 const struct ir3_const_state *const_state = ir3_const_state(v); in ir3_nir_lower_ubo_loads() local
428 const struct ir3_ubo_analysis_state *state = &const_state->ubo_state; in ir3_nir_lower_ubo_loads()
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| D | ir3_nir.h | 61 struct ir3_const_state *const_state);
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| D | ir3_shader.h | 514 struct ir3_const_state *const_state; member
747 return v->nonbinning->const_state; in ir3_const_state()
748 return v->const_state; in ir3_const_state()
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| D | ir3_compiler_nir.c | 94 struct ir3_const_state *const_state = ir3_const_state(ctx->so); in create_driver_param() local
95 unsigned n = const_state->offsets.driver_param; in create_driver_param()
756 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in emit_intrinsic_load_ubo() local
757 unsigned ubo = regid(const_state->offsets.ubo, 0); in emit_intrinsic_load_ubo()
777 const_state->offsets.ubo + (ctx->s->info.num_ubos * ptrsz)); in emit_intrinsic_load_ubo()
854 const struct ir3_const_state *const_state = ir3_const_state(ctx->so); in emit_intrinsic_ssbo_size() local
856 unsigned idx = regid(const_state->offsets.ssbo_sizes, 0) + in emit_intrinsic_ssbo_size()
857 const_state->ssbo_size.off[blk_idx]; in emit_intrinsic_ssbo_size()
859 debug_assert(const_state->ssbo_size.mask & (1 << blk_idx)); in emit_intrinsic_ssbo_size()
1235 const struct ir3_const_state *const_state = in emit_intrinsic_image_size_tex() local
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| /external/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_const.c | 136 const struct ir3_const_state *const_state = ir3_const_state(s); in emit_tess_bos() local
137 const unsigned regid = const_state->offsets.primitive_param * 4 + 4; in emit_tess_bos()
153 const struct ir3_const_state *const_state = ir3_const_state(v); in emit_stage_tess_consts() local
154 const unsigned regid = const_state->offsets.primitive_param; in emit_stage_tess_consts()
235 const struct ir3_const_state *const_state = ir3_const_state(v); in fd6_emit_ubos() local
236 int num_ubos = const_state->num_ubos; in fd6_emit_ubos()
283 struct ir3_const_state *const_state = ir3_const_state(v); in user_consts_cmdstream_size() local
284 struct ir3_ubo_analysis_state *ubo_state = &const_state->ubo_state; in user_consts_cmdstream_size()
294 size += 2 * const_state->num_ubos; in user_consts_cmdstream_size()
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| /external/mesa3d/src/freedreno/computerator/ |
| D | a6xx.c | 221 const struct ir3_const_state *const_state = ir3_const_state(v); in cs_const_emit() local
222 uint32_t base = const_state->offsets.immediate; in cs_const_emit()
223 int size = DIV_ROUND_UP(const_state->immediates_count, 4); in cs_const_emit()
228 const_state->immediates[idx * 4 + 0] = grid[0]; in cs_const_emit()
229 const_state->immediates[idx * 4 + 1] = grid[1]; in cs_const_emit()
230 const_state->immediates[idx * 4 + 2] = grid[2]; in cs_const_emit()
243 emit_const(ring, base, size, const_state->immediates); in cs_const_emit()
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| /external/mesa3d/src/freedreno/vulkan/ |
| D | tu_pipeline.c | 447 const struct ir3_const_state *const_state = ir3_const_state(xs); in tu6_emit_xs_config() local
448 uint32_t base = const_state->offsets.immediate; in tu6_emit_xs_config()
449 int size = DIV_ROUND_UP(const_state->immediates_count, 4); in tu6_emit_xs_config()
468 tu_cs_emit_array(cs, const_state->immediates, size * 4); in tu6_emit_xs_config()
735 const struct ir3_const_state *const_state = ir3_const_state(consumer); in tu6_emit_link_map() local
736 uint32_t base = const_state->offsets.primitive_map; in tu6_emit_link_map()
1412 uint32_t hs_base = hs->const_state->offsets.primitive_param; in tu6_emit_geom_tess_consts()
1425 uint32_t ds_base = ds->const_state->offsets.primitive_param; in tu6_emit_geom_tess_consts()
1438 uint32_t gs_base = gs->const_state->offsets.primitive_param; in tu6_emit_geom_tess_consts()
2247 link->const_state = *ir3_const_state(v); in tu_pipeline_set_linkage()
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| D | tu_cmd_buffer.c | 3016 const struct ir3_ubo_analysis_state *state = &link->const_state.ubo_state; in tu6_emit_user_consts()
3451 const struct ir3_const_state *const_state = &link->const_state; in vs_params_offset() local
3453 if (const_state->offsets.driver_param >= link->constlen) in vs_params_offset()
3462 assert(const_state->offsets.driver_param != 0); in vs_params_offset()
3464 return const_state->offsets.driver_param; in vs_params_offset()
3757 const struct ir3_const_state *const_state = &link->const_state; in tu_emit_compute_driver_params() local
3758 uint32_t offset = const_state->offsets.driver_param; in tu_emit_compute_driver_params()
3773 uint32_t num_consts = MIN2(const_state->num_driver_params, in tu_emit_compute_driver_params()
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| D | tu_private.h | 1060 struct ir3_const_state const_state; member
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| D | tu_clear_blit.c | 378 .const_state = &dummy_const_state, in r3d_common()
412 .const_state = &dummy_const_state, in r3d_common()
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| /external/mesa3d/docs/relnotes/ |
| D | 20.2.0.rst | 4117 - freedreno/ir3: add accessor for const_state
4119 - freedreno/ir3: move ubo_state into const_state
4124 - freedreno/ir3: move num_reserved_user_consts out of const_state
4125 - freedreno/ir3: un-embed const_state
4126 - freedreno/ir3: move const_state back to variant
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