Searched refs:sbclr (Results 1 – 5 of 5) sorted by relevance
| /external/llvm-project/llvm/test/MC/RISCV/ |
| D | rv32zbs-valid.s | 15 # CHECK-ASM-AND-OBJ: sbclr t0, t1, t2
17 sbclr t0, t1, t2 label
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| D | rv32zbs-invalid.s | 4 sbclr t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
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| /external/llvm-project/llvm/test/CodeGen/RISCV/ |
| D | rv32Zbs.ll | 20 ; RV32IB-NEXT: sbclr a0, a0, a1
25 ; RV32IBS-NEXT: sbclr a0, a0, a1
45 ; RV32IB-NEXT: sbclr a0, a0, a1
50 ; RV32IBS-NEXT: sbclr a0, a0, a1
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| D | rv64Zbs.ll | 98 ; RV64IB-NEXT: sbclr a0, a0, a1
103 ; RV64IBS-NEXT: sbclr a0, a0, a1
123 ; RV64IB-NEXT: sbclr a0, a0, a1
128 ; RV64IBS-NEXT: sbclr a0, a0, a1
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoB.td | 218 def SBCLR : ALU_rr<0b0100100, 0b001, "sbclr">, Sched<[]>;
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