Searched refs:sbinv (Results 1 – 5 of 5) sorted by relevance
/external/llvm-project/llvm/test/MC/RISCV/ |
D | rv32zbs-valid.s | 21 # CHECK-ASM-AND-OBJ: sbinv t0, t1, t2 23 sbinv t0, t1, t2 label
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D | rv32zbs-invalid.s | 8 sbinv t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
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/external/llvm-project/llvm/test/CodeGen/RISCV/ |
D | rv32Zbs.ll | 279 ; RV32IB-NEXT: sbinv a0, a0, a1 284 ; RV32IBS-NEXT: sbinv a0, a0, a1 311 ; RV32IB-NEXT: sbinv a0, a0, a2 319 ; RV32IBS-NEXT: sbinv a0, a0, a2
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D | rv64Zbs.ll | 377 ; RV64IB-NEXT: sbinv a0, a0, a1 382 ; RV64IBS-NEXT: sbinv a0, a0, a1 400 ; RV64IB-NEXT: sbinv a0, a0, a1 405 ; RV64IBS-NEXT: sbinv a0, a0, a1
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/external/llvm-project/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfoB.td | 220 def SBINV : ALU_rr<0b0110100, 0b001, "sbinv">, Sched<[]>;
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