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Searched refs:sqinch (Results 1 – 13 of 13) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dsqinch.s14 sqinch x0 label
20 sqinch x0, all label
26 sqinch x0, all, mul #1 label
32 sqinch x0, all, mul #16 label
43 sqinch x0, w0 label
49 sqinch x0, w0, all label
55 sqinch x0, w0, all, mul #1 label
61 sqinch x0, w0, all, mul #16 label
67 sqinch x0, w0, pow2 label
73 sqinch x0, w0, pow2, mul #16 label
[all …]
Dsqinch-diagnostics.s6 sqinch w0 label
11 sqinch wsp label
16 sqinch sp label
21 sqinch z0.s label
30 sqinch x0, w1 label
35 sqinch x0, x0 label
44 sqinch x0, all, mul #-1 label
49 sqinch x0, all, mul #0 label
54 sqinch x0, all, mul #17 label
63 sqinch x0, vl512 label
[all …]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-sqinc.ll18 define <vscale x 8 x i16> @sqinch(<vscale x 8 x i16> %a) {
19 ; CHECK-LABEL: sqinch:
20 ; CHECK: sqinch z0.h, pow2
22 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.sqinch.nxv8i16(<vscale x 8 x i16> %a,
120 ; CHECK: sqinch x0, w0, vl5, mul #6
122 %out = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %a, i32 5, i32 6)
128 ; CHECK: sqinch x0, w0, vl3, mul #4
130 %out = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %a, i32 3, i32 4)
138 ; CHECK: sqinch x0, vl6, mul #7
140 %out = call i64 @llvm.aarch64.sve.sqinch.n64(i64 %a, i32 6, i32 7)
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td867 defm SQINCH_XPiWdI : sve_int_pred_pattern_b_s32<0b01000, "sqinch", int_aarch64_sve_sqinch_n32>;
871 defm SQINCH_XPiI : sve_int_pred_pattern_b_x64<0b01100, "sqinch", int_aarch64_sve_sqinch_n64>;
894 defm SQINCH_ZPiI : sve_int_countvlv<0b01000, "sqinch", ZPR16, int_aarch64_sve_sqinch, nxv8i16>;
/external/vixl/src/aarch64/
Dassembler-aarch64.h5373 void sqinch(const Register& xd,
5380 void sqinch(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1);
5384 void sqinch(const ZRegister& zdn, int pattern = SVE_ALL, int multiplier = 1);
Dassembler-sve-aarch64.cc464 V(sqinch, SQINCH_r_rs_x) \
503 V(sqinch, SQINCH) \ in VIXL_SVE_UQINC_UQDEC_LIST()
531 V(sqinch, SQINC, H) \
Dmacro-assembler-aarch64.h5802 sqinch(xd, wn, pattern, multiplier);
5807 sqinch(rdn, pattern, multiplier);
5812 sqinch(zdn, pattern, multiplier);
/external/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc1145 __ sqinch(z15.VnH(), SVE_VL2); in TEST() local
1513 __ sqinch(z0.VnH(), SVE_VL2); in TEST() local
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12571 "l2\010sqdmullb\010sqdmullt\006sqincb\006sqincd\006sqinch\006sqincp\006s"
17679 …{ 4771 /* sqinch */, AArch64::SQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_H…
17680 …{ 4771 /* sqinch */, AArch64::SQINCH_ZPiI, Convert__SVEVectorHReg1_0__Tie0_1_1__imm_95_31__imm_95_…
17681 …{ 4771 /* sqinch */, AArch64::SQINCH_XPiWdI, Convert__Reg1_0__Tie255_1_2__GPR64as321_1__imm_95_31_…
17682 …{ 4771 /* sqinch */, AArch64::SQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__SVEPattern1_1__imm_95_1, AMF…
17683 …{ 4771 /* sqinch */, AArch64::SQINCH_ZPiI, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPattern1_1__imm…
17684 …{ 4771 /* sqinch */, AArch64::SQINCH_XPiWdI, Convert__Reg1_0__Tie255_1_2__GPR64as321_1__SVEPattern…
17685 …{ 4771 /* sqinch */, AArch64::SQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__SVEPattern1_1__Imm1_161_3, A…
17686 …{ 4771 /* sqinch */, AArch64::SQINCH_ZPiI, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPattern1_1__Imm…
17687 …{ 4771 /* sqinch */, AArch64::SQINCH_XPiWdI, Convert__Reg1_0__Tie0_1_2__SVEPattern1_2__Imm1_161_4,…
[all …]
DAArch64GenAsmWriter.inc22648 /* 10220 */ "sqinch $\x01\0"
22649 /* 10230 */ "sqinch $\x01, $\xFF\x03\x0E\0"
22650 /* 10246 */ "sqinch $\x01, $\xFF\x02\x35\0"
22651 /* 10262 */ "sqinch $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0"
22652 /* 10284 */ "sqinch $\xFF\x01\x09\0"
22653 /* 10296 */ "sqinch $\xFF\x01\x09, $\xFF\x03\x0E\0"
DAArch64GenAsmWriter1.inc23369 /* 10198 */ "sqinch $\x01\0"
23370 /* 10208 */ "sqinch $\x01, $\xFF\x03\x0E\0"
23371 /* 10224 */ "sqinch $\x01, $\xFF\x02\x35\0"
23372 /* 10240 */ "sqinch $\x01, $\xFF\x02\x35, $\xFF\x03\x0E\0"
23373 /* 10262 */ "sqinch $\xFF\x01\x09\0"
23374 /* 10274 */ "sqinch $\xFF\x01\x09, $\xFF\x03\x0E\0"
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td1313 defm SQINCH_XPiWdI : sve_int_pred_pattern_b_s32<0b01000, "sqinch", int_aarch64_sve_sqinch_n32>;
1317 defm SQINCH_XPiI : sve_int_pred_pattern_b_x64<0b01100, "sqinch", int_aarch64_sve_sqinch_n64>;
1340 defm SQINCH_ZPiI : sve_int_countvlv<0b01000, "sqinch", ZPR16, int_aarch64_sve_sqinch, nxv8i16>;
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc744 "llvm.aarch64.sve.sqinch",
745 "llvm.aarch64.sve.sqinch.n32",
746 "llvm.aarch64.sve.sqinch.n64",
10877 47, // llvm.aarch64.sve.sqinch
10878 47, // llvm.aarch64.sve.sqinch.n32
10879 47, // llvm.aarch64.sve.sqinch.n64