Searched refs:stcopr (Results 1 – 25 of 27) sorted by relevance
12
| /external/arm-trusted-firmware/lib/extensions/amu/aarch32/ |
| D | amu_helpers.S | 237 stcopr r1, AMEVTYPER10 /* index 0 */
239 stcopr r1, AMEVTYPER11 /* index 1 */
241 stcopr r1, AMEVTYPER12 /* index 2 */
243 stcopr r1, AMEVTYPER13 /* index 3 */
245 stcopr r1, AMEVTYPER14 /* index 4 */
247 stcopr r1, AMEVTYPER15 /* index 5 */
249 stcopr r1, AMEVTYPER16 /* index 6 */
251 stcopr r1, AMEVTYPER17 /* index 7 */
253 stcopr r1, AMEVTYPER18 /* index 8 */
255 stcopr r1, AMEVTYPER19 /* index 9 */
[all …]
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| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | el3_common_macros.S | 33 stcopr r0, SCTLR
44 stcopr r0, SCR
68 stcopr r0, NSACR
85 stcopr r0, CPACR
122 stcopr r0, SDCR
149 stcopr r0, PMCR
237 stcopr r0, SCTLR
267 stcopr r0, VBAR
268 stcopr r0, MVBAR
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| D | smccc_macros.S | 29 stcopr r2, SCR
60 stcopr r4, SCR
112 stcopr r5, PMCR
136 stcopr r1, SCR
162 stcopr r1, PMCR
171 stcopr r2, SCR
201 stcopr r4, SCR
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| D | asm_macros.S | 19 stcopr _reg, _coproc; \
21 stcopr _reg, _coproc
24 stcopr _reg, _coproc
40 .macro stcopr reg, coproc, opc1, CRn, CRm, opc2 macro
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| /external/arm-trusted-firmware/lib/xlat_tables_v2/aarch32/ |
| D | enable_mmu.S | 31 stcopr r1, MAIR0
35 stcopr r2, TTBCR
64 stcopr r1, SCTLR
88 stcopr r1, HMAIR0
92 stcopr r2, HTCR
116 stcopr r1, HSCTLR
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| /external/arm-trusted-firmware/lib/cpus/aarch32/ |
| D | cortex_a15.S | 30 stcopr r0, ACTLR
37 stcopr r0, TLBIMVA
46 stcopr r0, ACTLR
83 stcopr r0, CORTEX_A15_ACTLR2
137 stcopr r0, ACTLR
139 stcopr r0, VBAR
140 stcopr r0, MVBAR
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| D | cortex_a17.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
56 stcopr r0, CORTEX_A17_IMP_DEF_REG1
84 stcopr r0, CORTEX_A17_IMP_DEF_REG1
143 stcopr r0, VBAR
144 stcopr r0, MVBAR
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| D | cortex_a9.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
81 stcopr r0, VBAR
82 stcopr r0, MVBAR
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| D | cortex_a5.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
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| D | cortex_a12.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
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| D | cortex_a7.S | 24 stcopr r0, ACTLR
33 stcopr r0, ACTLR
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| D | cortex_a57.S | 47 stcopr r0, DBGOSDLR
54 stcopr r0, TLBIMVA
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| /external/arm-trusted-firmware/lib/aarch32/ |
| D | cache_helpers.S | 31 stcopr r0, \coproc, \opc1, \CRn, \CRm, \opc2
103 stcopr r1, CSSELR // select current cache level in csselr
133 stcopr r6, CSSELR //select cache level 0 in csselr
139 stcopr r0, DCISW
141 stcopr r0, DCCISW
143 stcopr r0, DCCSW
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| D | misc_helpers.S | 174 stcopr r0, BPIALL
179 stcopr r0, SCTLR
|
| /external/arm-trusted-firmware/plat/arm/board/juno/aarch32/ |
| D | juno_helpers.S | 56 stcopr r0, CNTKCTL
70 stcopr r0, CORTEX_A57_L2CTLR
106 stcopr r0, CORTEX_A57_L2CTLR
141 stcopr r0, CORTEX_A72_L2CTLR
|
| /external/arm-trusted-firmware/bl1/aarch32/ |
| D | bl1_exceptions.S | 64 stcopr r0, TLBIALL
110 stcopr r0, SCR
124 stcopr r9, SCTLR
146 stcopr r0, TLBIALL
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| D | bl1_entrypoint.S | 90 stcopr r0, TLBIALL
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| /external/arm-trusted-firmware/bl2u/aarch32/ |
| D | bl2u_entrypoint.S | 41 stcopr r0, VBAR
51 stcopr r0, SCTLR
|
| /external/arm-trusted-firmware/lib/psci/aarch32/ |
| D | psci_helpers.S | 91 stcopr r0, SCTLR
111 stcopr r1, SCTLR
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| /external/arm-trusted-firmware/bl2/aarch32/ |
| D | bl2_entrypoint.S | 42 stcopr r0, VBAR
52 stcopr r0, SCTLR
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| D | bl2_el3_entrypoint.S | 69 stcopr r0, TLBIALL
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| /external/arm-trusted-firmware/lib/extensions/mtpmu/aarch32/ |
| D | mtpmu.S | 82 stcopr r0, SDCR
102 stcopr r0, HDCR
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| /external/arm-trusted-firmware/bl32/sp_min/aarch32/ |
| D | entrypoint.S | 35 stcopr \reg, SCR
217 stcopr r0, SCR
261 stcopr r0, SCR
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| /external/arm-trusted-firmware/bl32/sp_min/ |
| D | wa_cve_2017_5715_icache_inv.S | 27 stcopr r0, ICIALLU
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| D | wa_cve_2017_5715_bpiall.S | 26 stcopr r0, BPIALL
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