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Searched refs:stnt1d (Results 1 – 19 of 19) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dstnt1d-diagnostics.s6 stnt1d z23.d, p0, [x13, #-9, MUL VL] label
11 stnt1d z29.d, p0, [x3, #8, MUL VL] label
20 stnt1d z0.b, p0, [x0] label
25 stnt1d z0.h, p0, [x0] label
30 stnt1d z0.s, p0, [x0] label
39 stnt1d z27.d, p8, [x0] label
44 stnt1d z0.d, p0/z, [x0] label
49 stnt1d z0.d, p0/m, [x0] label
54 stnt1d z0.d, p7.b, [x0] label
59 stnt1d z0.d, p7.q, [x0] label
[all …]
Dstnt1d.s10 stnt1d z0.d, p0, [x0] label
16 stnt1d { z0.d }, p0, [x0] label
22 stnt1d { z23.d }, p3, [x13, #-8, mul vl] label
28 stnt1d { z21.d }, p5, [x10, #7, mul vl] label
34 stnt1d { z0.d }, p0, [x0, x0, lsl #3] label
/external/llvm-project/llvm/test/MC/AArch64/SVE2/
Dstnt1d-diagnostics.s7 stnt1d { z0.b }, p0, [z0.s] label
12 stnt1d { z0.h }, p0, [z0.s] label
17 stnt1d { z0.s }, p0, [z0.s] label
26 stnt1d { z0.d }, p0, [z0.b] label
35 stnt1d { z0.d }, p0, [z0.d, z1.d] label
44 stnt1d { z27.d }, p8, [z0.d] label
53 stnt1d { }, p0, [z0.d] label
58 stnt1d { z0.d, z1.d }, p0, [z0.d] label
63 stnt1d { v0.2d }, p0, [z0.d] label
73 stnt1d { z0.d }, p0, [z0.d, x0] label
[all …]
Dstnt1d.s10 stnt1d z0.d, p0, [z1.d] label
16 stnt1d z31.d, p7, [z31.d, xzr] label
22 stnt1d z31.d, p7, [z31.d, x0] label
28 stnt1d { z0.d }, p0, [z1.d] label
34 stnt1d { z31.d }, p7, [z31.d, xzr] label
40 stnt1d { z31.d }, p7, [z31.d, x0] label
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve2-intrinsics-nt-scatter-stores-64bit-scaled-offset.ll43 ; CHECK-NEXT: stnt1d { z0.d }, p0, [z1.d, x0]
55 ; CHECK-NEXT: stnt1d { z0.d }, p0, [z1.d, x0]
Dsve2-intrinsics-nt-scatter-stores-64bit-unscaled-offset.ll50 ; CHECK: stnt1d { z0.d }, p0, [z1.d, x0]
61 ; CHECK: stnt1d { z0.d }, p0, [z1.d, x0]
Dsve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll19 ; CHECK-NEXT: stnt1d { z[[DATA]].d }, p0, [x{{[0-9]+}}]
39 ; CHECK-NEXT: stnt1d { z[[DATA]].d }, p0, [x0, #-7, mul vl]
56 ; CHECK-NEXT: stnt1d { z[[DATA]].d }, p0, [x0, #-5, mul vl]
Dsve2-intrinsics-nt-scatter-stores-vector-base-scalar-offset.ll100 ; CHECK: stnt1d { z0.d }, p0, [z1.d, x0]
111 ; CHECK: stnt1d { z0.d }, p0, [z1.d, x0]
Dsve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll12 ; CHECK-NEXT: stnt1d { z[[DATA]].d }, p0, [x0, x1, lsl #3]
26 ; CHECK-NEXT: stnt1d { z[[DATA]].d }, p0, [x0, x1, lsl #3]
Dsve-intrinsics-stores.ll456 ; CHECK: stnt1d { z0.d }, p0, [x0]
466 ; CHECK: stnt1d { z0.d }, p0, [x0]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12587 "\005stlxp\005stlxr\006stlxrb\006stlxrh\004stnp\006stnt1b\006stnt1d\006s"
18790 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZRI, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1…
18791 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZZR_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_…
18792 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZRI, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__R…
18793 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZZR_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyRe…
18794 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZRR, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1…
18795 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZZR_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_…
18796 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZRR, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__R…
18797 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZZR_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyRe…
18798 …{ 5573 /* stnt1d */, AArch64::STNT1D_ZRI, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1…
[all …]
DAArch64GenAsmWriter.inc22768 /* 12675 */ "stnt1d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0"
22769 /* 12699 */ "stnt1d $\xFF\x01\x20, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
DAArch64GenAsmWriter1.inc23489 /* 12653 */ "stnt1d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0"
23490 /* 12677 */ "stnt1d $\xFF\x01\x20, $\xFF\x02\x07, [$\xFF\x03\x10]\0"
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td699 defm STNT1D_ZRI : sve_mem_cstnt_si<0b11, "stnt1d", Z_d, ZPR64>;
705 defm STNT1D_ZRR : sve_mem_cstnt_ss<0b11, "stnt1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
1584 defm STNT1D_ZZR_D : sve2_mem_sstnt_vs<0b110, "stnt1d", Z_d, ZPR64>;
/external/vixl/src/aarch64/
Dmacro-assembler-sve-aarch64.cc1603 &MacroAssembler::stnt1d, in Stnt1d()
Dassembler-aarch64.h5541 void stnt1d(const ZRegister& zt,
Dassembler-sve-aarch64.cc5167 void Assembler::stnt1d(const ZRegister& zt, in stnt1d() function in vixl::aarch64::Assembler
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td1039 defm STNT1D_ZRI : sve_mem_cstnt_si<0b11, "stnt1d", Z_d, ZPR64>;
1045 defm STNT1D_ZRR : sve_mem_cstnt_ss<0b11, "stnt1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
2763 defm STNT1D_ZZR_D : sve2_mem_sstnt_vs_64_ptrs<0b110, "stnt1d", AArch64stnt1_scatter, nxv2i64>;
/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc4628 COMPARE_PREFIX(stnt1d(z10.VnD(), in TEST()
4647 COMPARE_PREFIX(stnt1d(z2.VnD(), in TEST()