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Searched refs:v128i8 (Results 1 – 25 of 69) sorted by relevance

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/external/llvm-project/llvm/test/Transforms/EarlyCSE/
Dmasked-intrinsics.ll7 ; CHECK-NEXT: call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> [[A1]], <128 x i8>* [[A0:%…
11 …call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %a1, <128 x i8>* %a0, i32 4, <128 x i1> %v…
12 …%v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <1…
19 ; CHECK-NEXT: [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0:%.…
23 …%v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <1…
24 …call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %v1, <128 x i8>* %a0, i32 4, <128 x i1> %v…
31 ; CHECK-NEXT: [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0:%.…
36 …%v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <1…
37 …%v2 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <1…
42 declare <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>*, i32, <128 x i1>, <128 x i8>)
[all …]
/external/llvm-project/llvm/test/Transforms/GVN/
Dmasked-load-store.ll10 ; CHECK-NEXT: [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0:%.…
15 …%v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <1…
16 …%v2 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <1…
25 ; CHECK-NEXT: [[V2:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0]],…
26 ; CHECK-NEXT: call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> [[A2]], <128 x i8>* [[V1]]…
32 …%v2 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <1…
33 …call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %a2, <128 x i8>* %v1, i32 4, <128 x i1> %v…
34 …%v3 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <1…
39 declare <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>*, i32, <128 x i1>, <128 x i8>)
40 declare void @llvm.masked.store.v128i8.p0v128i8(<128 x i8>, <128 x i8>*, i32, <128 x i1>)
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonCallingConv.td88 CCIfType<[v32i32,v64i16,v128i8],
94 CCIfType<[v32i32,v64i16,v128i8],
99 CCIfType<[v32i32,v64i16,v128i8],
105 CCIfType<[v32i32,v64i16,v128i8],
120 CCIfType<[v32i32,v64i16,v128i8],
125 CCIfType<[v32i32,v64i16,v128i8],
/external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/
Dmasked-vmem-basic.ll10 …%v2 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %q0, <1…
21 …call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %v1, <128 x i8>* %a0, i32 4, <128 x i1> %q…
27 declare <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>*, i32 immarg, <128 x i1>, <128 x i8…
28 declare void @llvm.masked.store.v128i8.p0v128i8(<128 x i8>, <128 x i8>*, i32 immarg, <128 x i1>) #2
Dbitcount-128b.ll9 %t0 = call <128 x i8> @llvm.ctpop.v128i8(<128 x i8> %a0)
38 %t0 = call <128 x i8> @llvm.ctlz.v128i8(<128 x i8> %a0)
74 %t0 = call <128 x i8> @llvm.cttz.v128i8(<128 x i8> %a0)
112 declare <128 x i8> @llvm.ctpop.v128i8(<128 x i8>) #0
116 declare <128 x i8> @llvm.ctlz.v128i8(<128 x i8>) #0
120 declare <128 x i8> @llvm.cttz.v128i8(<128 x i8>) #0
Disel-widen-truncate.ll16 …tail call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %v1, <128 x i8>* undef, i32 128, <128…
21 declare void @llvm.masked.store.v128i8.p0v128i8(<128 x i8>, <128 x i8>*, i32 immarg, <128 x i1>) #1
/external/llvm-project/llvm/lib/Target/Hexagon/
DHexagonCallingConv.td118 CCIfType<[v32i32,v64i16,v128i8],
124 CCIfType<[v32i32,v64i16,v128i8],
129 CCIfType<[v32i32,v64i16,v128i8],
135 CCIfType<[v32i32,v64i16,v128i8],
150 CCIfType<[v32i32,v64i16,v128i8],
155 CCIfType<[v32i32,v64i16,v128i8],
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h75 v128i8 = 28, //128 x i8 enumerator
272 return (SimpleTy == MVT::v1024i1 || SimpleTy == MVT::v128i8 || in is1024BitVector()
332 case v128i8: in getVectorElementType()
378 case v128i8: in getVectorNumElements()
504 case v128i8: in getSizeInBits()
610 if (NumElements == 128) return MVT::v128i8; in getVectorVT()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h79 v128i8 = 32, //128 x i8 enumerator
375 return (SimpleTy == MVT::v1024i1 || SimpleTy == MVT::v128i8 || in is1024BitVector()
452 case v128i8: in getVectorElementType()
564 case v128i8: in getVectorNumElements()
804 case v128i8: in getSizeInBits()
943 if (NumElements == 128) return MVT::v128i8; in getVectorVT()
/external/llvm-project/llvm/test/Analysis/CostModel/ARM/
Dreduce-add.ll56 …mated cost of 382 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
66 …ated cost of 1070 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
76 …mated cost of 382 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
86 …ated cost of 1066 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
95 %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
124 declare i8 @llvm.vector.reduce.add.v128i8(<128 x i8>)
Dreduce-umin.ll117 …ated cost of 763 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
127 …ted cost of 1081 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
137 …ed cost of 36412 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
146 %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
175 declare i8 @llvm.vector.reduce.umin.v128i8(<128 x i8>)
Dreduce-smin.ll117 …ated cost of 763 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
127 …ted cost of 1081 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
137 …ed cost of 36412 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
146 %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
175 declare i8 @llvm.vector.reduce.smin.v128i8(<128 x i8>)
Dreduce-umax.ll117 …ated cost of 763 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
127 …ted cost of 1081 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
137 …ed cost of 36412 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
146 %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
175 declare i8 @llvm.vector.reduce.umax.v128i8(<128 x i8>)
Dreduce-smax.ll117 …ated cost of 763 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
127 …ted cost of 1081 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
137 …ed cost of 36412 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
146 %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
175 declare i8 @llvm.vector.reduce.smax.v128i8(<128 x i8>)
/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h80 v128i8 = 33, //128 x i8 enumerator
408 return (SimpleTy == MVT::v1024i1 || SimpleTy == MVT::v128i8 || in is1024BitVector()
520 case v128i8: in getVectorElementType()
659 case v128i8: in getVectorNumElements()
943 case v128i8: in getSizeInBits()
1130 if (NumElements == 128) return MVT::v128i8; in getVectorVT()
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dstore-vector-pred.ll20 …%v6 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* nonnull undef, i32 1, <128 x i…
44 declare <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>*, i32 immarg, <128 x i1>, <128 x i8…
/external/llvm-project/llvm/test/Transforms/DeadStoreElimination/
Dmasked-dead-store.ll17 ; CHECK-NEXT: [[V10:%.*]] = tail call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* […
25 ; CHECK-NEXT: [[V21:%.*]] = tail call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* […
30 ; CHECK-NEXT: tail call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> [[V25]], <128 x i8>* …
38 …tail call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, …
43 …%v10 = tail call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %v9, i32 32, <128 x i1> …
46 …tail call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %v14, <128 x i8>* %v3, i32 32, <128 x…
52 …%v21 = tail call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %v20, i32 32, <128 x i1>…
57 …tail call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %v25, <128 x i8>* %v3, i32 32, <128 x…
61 declare void @llvm.masked.store.v128i8.p0v128i8(<128 x i8>, <128 x i8>*, i32 immarg, <128 x i1>) #1
62 declare <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>*, i32 immarg, <128 x i1>, <128 x i8…
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Dreduce-add.ll192 …imated cost of 10 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
202 …imated cost of 16 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
212 …timated cost of 7 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
222 …imated cost of 15 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
232 …imated cost of 14 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
242 …imated cost of 15 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
252 …imated cost of 10 for instruction: %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
261 %V128 = call i8 @llvm.vector.reduce.add.v128i8(<128 x i8> undef)
290 declare i8 @llvm.vector.reduce.add.v128i8(<128 x i8>)
Dreduce-umin.ll224 …mated cost of 16 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
234 …mated cost of 16 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
244 …mated cost of 13 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
254 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
264 …mated cost of 11 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
274 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
284 …mated cost of 11 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
294 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
303 %V128 = call i8 @llvm.vector.reduce.umin.v128i8(<128 x i8> undef)
332 declare i8 @llvm.vector.reduce.umin.v128i8(<128 x i8>)
Dreduce-smax.ll224 …mated cost of 49 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
234 …mated cost of 49 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
244 …mated cost of 13 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
254 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
264 …mated cost of 11 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
274 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
284 …mated cost of 11 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
294 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
303 %V128 = call i8 @llvm.vector.reduce.smax.v128i8(<128 x i8> undef)
332 declare i8 @llvm.vector.reduce.smax.v128i8(<128 x i8>)
Dreduce-umax.ll224 …mated cost of 16 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
234 …mated cost of 16 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
244 …mated cost of 13 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
254 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
264 …mated cost of 11 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
274 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
284 …mated cost of 11 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
294 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
303 %V128 = call i8 @llvm.vector.reduce.umax.v128i8(<128 x i8> undef)
332 declare i8 @llvm.vector.reduce.umax.v128i8(<128 x i8>)
Dreduce-smin.ll224 …mated cost of 49 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
234 …mated cost of 49 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
244 …mated cost of 13 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
254 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
264 …mated cost of 11 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
274 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
284 …mated cost of 11 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
294 …mated cost of 17 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
303 %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
332 declare i8 @llvm.vector.reduce.smin.v128i8(<128 x i8>)
Dreduce-mul.ll197 …mated cost of 137 for instruction: %V128 = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> undef)
207 …mated cost of 144 for instruction: %V128 = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> undef)
217 …imated cost of 92 for instruction: %V128 = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> undef)
227 …imated cost of 71 for instruction: %V128 = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> undef)
237 …imated cost of 42 for instruction: %V128 = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> undef)
247 …imated cost of 71 for instruction: %V128 = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> undef)
256 %V128 = call i8 @llvm.vector.reduce.mul.v128i8(<128 x i8> undef)
285 declare i8 @llvm.vector.reduce.mul.v128i8(<128 x i8>)
/external/llvm/lib/IR/
DValueTypes.cpp160 case MVT::v128i8: return "v128i8"; in getEVTString()
238 case MVT::v128i8: return VectorType::get(Type::getInt8Ty(Context), 128); in getTypeForEVT()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp204 LocVT == MVT::v128i8 || LocVT == MVT::v1024i1) { in CC_Hexagon_VarArg()
349 LocVT == MVT::v128i8)) { in CC_HexagonVector()
372 LocVT == MVT::v128i8 || LocVT == MVT::v1024i1)) { in CC_HexagonVector()
418 } else if (LocVT == MVT::v128i8 || LocVT == MVT::v64i16 || in RetCC_Hexagon()
546 ty == MVT::v128i8 || in IsHvxVectorType()
899 VT == MVT::v64i16 || VT == MVT::v128i8); in getIndexedAddressParts()
1126 RegVT == MVT::v64i16 || RegVT == MVT::v128i8))) { in LowerFormalArguments()
1134 RegVT == MVT::v64i16 || RegVT == MVT::v128i8)) { in LowerFormalArguments()
1759 addRegisterClass(MVT::v128i8, &Hexagon::VecDblRegsRegClass); in HexagonTargetLowering()
1765 addRegisterClass(MVT::v128i8, &Hexagon::VectorRegs128BRegClass); in HexagonTargetLowering()
[all …]

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