| /external/clang/test/CodeGen/ |
| D | systemz-abi-vector.c | 18 typedef __attribute__((vector_size(4))) float v1f32; typedef
106 v1f32 pass_v1f32(v1f32 arg) { return arg; } in pass_v1f32()
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| /external/llvm-project/clang/test/CodeGen/SystemZ/ |
| D | systemz-abi-vector.c | 28 typedef __attribute__((vector_size(4))) float v1f32; typedef
116 v1f32 pass_v1f32(v1f32 arg) { return arg; } in pass_v1f32()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineValueType.h | 110 v1f32 = 55, // 1 x f32 enumerator
236 SimpleTy == MVT::v1f32); in is32BitVector()
359 case v1f32: in getVectorElementType()
424 case v1f32: in getVectorNumElements()
465 case v1f32: in getSizeInBits()
649 if (NumElements == 1) return MVT::v1f32; in getVectorVT()
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| /external/llvm-project/llvm/test/Transforms/LowerMatrixIntrinsics/ |
| D | multiply-float-contraction-fmf.ll | 22 ; CHECK-NEXT: [[TMP3:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK4]], <1 x f…
34 ; CHECK-NEXT: [[TMP9:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK10]], <1 x …
46 ; CHECK-NEXT: [[TMP15:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK16]], <1 x…
58 ; CHECK-NEXT: [[TMP21:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK22]], <1 x…
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| D | multiply-float-contraction.ll | 22 ; CHECK-NEXT: [[TMP3:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK4]], <1 x f…
34 ; CHECK-NEXT: [[TMP9:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK10]], <1 x …
46 ; CHECK-NEXT: [[TMP15:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK16]], <1 x…
58 ; CHECK-NEXT: [[TMP21:%.*]] = call <1 x float> @llvm.fmuladd.v1f32(<1 x float> [[BLOCK22]], <1 x…
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| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | vector-fcopysign.ll | 5 ;============ v1f32
13 %r = call <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %b)
25 %r = call <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %tmp0)
29 declare <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %b) #0
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| D | vecreduce-fmax-legalization-nan.ll | 5 declare float @llvm.vector.reduce.fmax.v1f32(<1 x float> %a)
27 %b = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> %a)
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| D | vecreduce-fmin-legalization.ll | 5 declare float @llvm.vector.reduce.fmin.v1f32(<1 x float> %a)
27 %b = call nnan float @llvm.vector.reduce.fmin.v1f32(<1 x float> %a)
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| D | vecreduce-fmax-legalization.ll | 5 declare float @llvm.vector.reduce.fmax.v1f32(<1 x float> %a)
27 %b = call nnan float @llvm.vector.reduce.fmax.v1f32(<1 x float> %a)
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| D | vecreduce-fmul-legalization-strict.ll | 7 declare float @llvm.vector.reduce.fmul.f32.v1f32(float, <1 x float>)
29 %b = call float @llvm.vector.reduce.fmul.f32.v1f32(float 1.0, <1 x float> %a)
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| D | vecreduce-fadd-legalization.ll | 5 declare float @llvm.vector.reduce.fadd.f32.v1f32(float, <1 x float>)
28 %b = call reassoc float @llvm.vector.reduce.fadd.f32.v1f32(float -0.0, <1 x float> %a)
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| D | vecreduce-fadd-legalization-strict.ll | 7 declare float @llvm.vector.reduce.fadd.f32.v1f32(float, <1 x float>)
42 %b = call float @llvm.vector.reduce.fadd.f32.v1f32(float %s, <1 x float> %a)
52 %b = call float @llvm.vector.reduce.fadd.f32.v1f32(float -0.0, <1 x float> %a)
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| /external/llvm/test/CodeGen/AArch64/ |
| D | vector-fcopysign.ll | 5 ;============ v1f32
13 %r = call <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %b)
25 %r = call <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %tmp0)
29 declare <1 x float> @llvm.copysign.v1f32(<1 x float> %a, <1 x float> %b) #0
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| /external/llvm-project/llvm/test/Analysis/CostModel/X86/ |
| D | reduce-fmax.ll | 47 …mated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> undef)
56 …mated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> undef)
65 …mated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> undef)
73 %V1 = call float @llvm.vector.reduce.fmax.v1f32(<1 x float> undef)
88 declare float @llvm.vector.reduce.fmax.v1f32(<1 x float>)
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| D | reduce-fmin.ll | 47 …mated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmin.v1f32(<1 x float> undef)
56 …mated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmin.v1f32(<1 x float> undef)
65 …mated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmin.v1f32(<1 x float> undef)
73 %V1 = call float @llvm.vector.reduce.fmin.v1f32(<1 x float> undef)
88 declare float @llvm.vector.reduce.fmin.v1f32(<1 x float>)
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| D | reduce-fadd.ll | 79 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fadd.v1f32(float %arg, <1 x f…
88 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fadd.v1f32(float %arg, <1 x f…
97 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fadd.v1f32(float %arg, <1 x f…
106 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fadd.v1f32(float %arg, <1 x f…
115 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fadd.v1f32(float %arg, <1 x f…
124 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fadd.v1f32(float %arg, <1 x f…
133 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fadd.v1f32(float %arg, <1 x f…
141 %V1 = call float @llvm.vector.reduce.fadd.v1f32(float %arg, <1 x float> undef)
156 declare float @llvm.vector.reduce.fadd.v1f32(float, <1 x float>)
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| D | reduce-fmul.ll | 79 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmul.v1f32(float %arg, <1 x f…
88 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmul.v1f32(float %arg, <1 x f…
97 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmul.v1f32(float %arg, <1 x f…
106 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmul.v1f32(float %arg, <1 x f…
115 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmul.v1f32(float %arg, <1 x f…
124 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmul.v1f32(float %arg, <1 x f…
133 …ated cost of 0 for instruction: %V1 = call float @llvm.vector.reduce.fmul.v1f32(float %arg, <1 x f…
141 %V1 = call float @llvm.vector.reduce.fmul.v1f32(float %arg, <1 x float> undef)
156 declare float @llvm.vector.reduce.fmul.v1f32(float, <1 x float>)
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| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | vector-constrained-fp-intrinsics-flags.ll | 10 …%add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(<1 x float> <float 0x7FF00000000…
59 declare <1 x float> @llvm.experimental.constrained.fadd.v1f32(<1 x float>, <1 x float>, metadata, m…
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| D | vector-constrained-fp-intrinsics-fma.ll | 12 %fma = call <1 x float> @llvm.experimental.constrained.fma.v1f32(
145 declare <1 x float> @llvm.experimental.constrained.fma.v1f32(<1 x float>, <1 x float>, <1 x float>,…
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| D | vector-constrained-fp-intrinsics.ll | 20 %div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32(
171 %rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32(
417 %mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32(
554 %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(
692 %sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32(
833 %sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32(
961 %pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32(
1218 %powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32(
1472 %sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32(
1697 %cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32(
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | MachineValueType.h | 125 v1f32 = 70, // 1 x f32 enumerator
337 SimpleTy == MVT::v2f16 || SimpleTy == MVT::v1f32); in is32BitVector()
517 case v1f32: in getVectorElementType()
658 case v1f32: in getVectorNumElements()
724 case v1f32: in getSizeInBits()
993 if (NumElements == 1) return MVT::v1f32; in getVectorVT()
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| /external/llvm-project/llvm/include/llvm/Support/ |
| D | MachineValueType.h | 139 v1f32 = 84, // 1 x f32 enumerator
367 SimpleTy == MVT::v1f32); in is32BitVector()
605 case v1f32: in getVectorElementType()
776 case v1f32: in getVectorNumElements()
851 case v1f32: in getSizeInBits()
1195 if (NumElements == 1) return MVT::v1f32; in getVectorVT()
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | vecreduce-fmul-legalization-strict.ll | 5 declare float @llvm.vector.reduce.fmul.f32.v1f32(float, <1 x float>)
32 %b = call float @llvm.vector.reduce.fmul.f32.v1f32(float 1.0, <1 x float> %a)
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| /external/llvm/lib/IR/ |
| D | ValueTypes.cpp | 184 case MVT::v1f32: return "v1f32"; in getEVTString()
265 case MVT::v1f32: return VectorType::get(Type::getFloatTy(Context), 1); in getTypeForEVT()
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| /external/llvm-project/llvm/test/CodeGen/PowerPC/ |
| D | vector-constrained-fp-intrinsics.ll | 24 %div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32(
252 %rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32(
652 %mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32(
868 %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(
1080 %sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32(
1288 %sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32(
1481 %pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32(
1894 %powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32(
2274 %sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32(
2623 %cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32(
[all …]
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