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/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dintrinsics-v67.ll67 %0 = tail call i64 @llvm.hexagon.M7.vdmpy(i64 %a, i64 %b)
71 declare i64 @llvm.hexagon.M7.vdmpy(i64, i64) #1
77 %0 = tail call i64 @llvm.hexagon.M7.vdmpy.acc(i64 %a, i64 %b, i64 %c)
81 declare i64 @llvm.hexagon.M7.vdmpy.acc(i64, i64, i64) #1
87 %0 = tail call i64 @llvm.hexagon.M7.dcmpyrw(i64 %rss, i64 %rtt)
91 declare i64 @llvm.hexagon.M7.dcmpyrw(i64, i64) #1
97 %0 = tail call i64 @llvm.hexagon.M7.dcmpyrw.acc(i64 %rxx, i64 %rss, i64 %rtt)
101 declare i64 @llvm.hexagon.M7.dcmpyrw.acc(i64, i64, i64) #1
107 %0 = tail call i64 @llvm.hexagon.M7.dcmpyrwc(i64 %rss, i64 %rtt)
111 declare i64 @llvm.hexagon.M7.dcmpyrwc(i64, i64) #1
[all …]
Dtiny_bkfir_loop_align.ll70 %14 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %sum0.0131.us, i64 %x0x1.0136.us, i64 %8)
71 %15 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %sum1.0130.us, i64 %x1x2.0134.us, i64 %8)
72 %16 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %sum2.0129.us, i64 %x2x3.0135.us, i64 %8)
73 %17 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %sum3.0128.us, i64 %12, i64 %8)
74 %18 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %14, i64 %x2x3.0135.us, i64 %9)
75 %19 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %15, i64 %12, i64 %9)
76 %20 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %16, i64 %10, i64 %9)
77 %21 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %17, i64 %13, i64 %9)
130 declare i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64, i64, i64) #1
Dtiny_bkfir_artdeps.ll67 %14 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %sum0.0131.us, i64 %x0x1.0136.us, i64 %8)
68 %15 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %sum1.0130.us, i64 %x1x2.0134.us, i64 %8)
69 %16 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %sum2.0129.us, i64 %x2x3.0135.us, i64 %8)
70 %17 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %sum3.0128.us, i64 %12, i64 %8)
71 %18 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %14, i64 %x2x3.0135.us, i64 %9)
72 %19 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %15, i64 %12, i64 %9)
73 %20 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %16, i64 %10, i64 %9)
74 %21 = tail call i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64 %17, i64 %13, i64 %9)
127 declare i64 @llvm.hexagon.M7.dcmpyrwc.acc(i64, i64, i64) #1
/external/llvm-project/clang/test/CoverageMapping/
Dmacro-expansion.c37 #define M7(x) (x) macro
55 if (M7(x)) {} in func()
/external/clang/test/CoverageMapping/
Dmacro-expansion.c35 #define M7(x) (x) macro
53 if (M7(x)) {} in func()
/external/clang/test/Sema/
Dunused-expr.c136 #define M7() fn2() macro
149 M7(); // no warning in t11()
158 #undef M7
/external/llvm-project/clang/test/Sema/
Dunused-expr.c136 #define M7() fn2() macro
149 M7(); // no warning in t11()
158 #undef M7
/external/llvm-project/clang/test/Misc/
Dmacro-backtrace.c10 #define M7(A, B) M6(A, B) macro
11 #define M8(A, B) M7(A, B)
/external/clang/test/Misc/
Dmacro-backtrace.c10 #define M7(A, B) M6(A, B) macro
11 #define M8(A, B) M7(A, B)
/external/tensorflow/tensorflow/lite/micro/tools/make/targets/
Dcortex_m_generic_makefile.inc53 CORE=M7
54 ARM_LDFLAGS := -Wl,--cpu=Cortex-M7.no_fp
58 CORE=M7
59 ARM_LDFLAGS := -Wl,--cpu=Cortex-M7
Dcortex_m_corstone_300_makefile.inc64 CORE=M7
68 CORE=M7
/external/llvm-project/llvm/utils/unittest/googlemock/include/gmock/
Dgmock-generated-matchers.h353 typename M6, typename M7>
357 typename AllOfResult4<M4, M5, M6, M7>::type
362 typename M6, typename M7, typename M8>
366 typename AllOfResult4<M5, M6, M7, M8>::type
371 typename M6, typename M7, typename M8, typename M9>
375 typename AllOfResult5<M5, M6, M7, M8, M9>::type
380 typename M6, typename M7, typename M8, typename M9, typename M10>
384 typename AllOfResult5<M6, M7, M8, M9, M10>::type
441 typename M6, typename M7>
445 typename AnyOfResult4<M4, M5, M6, M7>::type
[all …]
/external/llvm/test/CodeGen/ARM/
Dbuild-attributes.ll94 … -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
95 …p-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
96 …ortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
97 …infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
98 … %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
1090 ; CORTEX-M7: .cpu cortex-m7
1091 ; CORTEX-M7: .eabi_attribute 6, 13
1092 ; CORTEX-M7: .eabi_attribute 7, 77
1093 ; CORTEX-M7: .eabi_attribute 8, 0
1094 ; CORTEX-M7: .eabi_attribute 9, 2
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Dbuild-attributes.ll99 …mcpu=cortex-m7 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
100 …p-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
101 …mcpu=cortex-m7 -mattr=-fp64 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
102 …infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
103 … %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
1162 ; CORTEX-M7: .cpu cortex-m7
1163 ; CORTEX-M7: .eabi_attribute 6, 13
1164 ; CORTEX-M7: .eabi_attribute 7, 77
1165 ; CORTEX-M7: .eabi_attribute 8, 0
1166 ; CORTEX-M7: .eabi_attribute 9, 2
[all …]
/external/llvm/test/CodeGen/AArch64/
Dbitreverse.ll57 ; CHECK-DAG: movi [[M7:v.*]], #2{{$}}
73 ; CHECK-DAG: and [[A7:v.*]], [[S7]], [[M7]]
/external/exoplayer/tree/testdata/src/test/assets/ts/
Dsample_with_sdt.ts5 �ө��H�t��i�����AV���n�֮�M7���sZ�w�#q^*==���7�`*D�574��~�R��һK
/external/llvm-project/llvm/lib/Target/ARM/
DARMScheduleM7.td1 //=- ARMScheduleM7.td - ARM Cortex-M7 Scheduling Definitions -*- tablegen -*-=//
9 // This file defines the SchedRead/Write data for the ARM Cortex-M7 processor.
15 let MicroOpBufferSize = 0; // The Cortex-M7 is in-order.
23 // The Cortex-M7 has two ALU, two LOAD, a STORE, a MAC, a BRANCH and a VFP
147 // Not used for M7, but needing definitions anyway
/external/llvm-project/llvm/test/CodeGen/WebAssembly/
Dstack-alignment.ll57 ; CHECK: local.get $push[[M7:.+]]=, [[SP]]{{$}}
58 ; CHECK: i[[PTR]].add $push[[L8:.+]]=, $pop[[M7]], $pop{{.+}}
/external/mesa3d/src/mesa/sparc/
Dsparc_matrix.h30 #define M7 %f23 macro
/external/python/cpython3/PC/icons/
Dlauncher.svg1 …c-1.802 1.928-3 5.291-3 9.128z"/><path class="icon-visualstudio-online" d="M7.5 7a1 1 0 1 1-2 0 1 …
/external/icu/icu4c/source/data/locales/
Drof.txt155 "M7",
/external/fmtlib/test/gmock/
Dgmock.h12060 typename M6, typename M7>
12064 typename AllOfResult4<M4, M5, M6, M7>::type
12069 typename M6, typename M7, typename M8>
12073 typename AllOfResult4<M5, M6, M7, M8>::type
12078 typename M6, typename M7, typename M8, typename M9>
12082 typename AllOfResult5<M5, M6, M7, M8, M9>::type
12087 typename M6, typename M7, typename M8, typename M9, typename M10>
12091 typename AllOfResult5<M6, M7, M8, M9, M10>::type
12148 typename M6, typename M7>
12152 typename AnyOfResult4<M4, M5, M6, M7>::type
[all …]
/external/rust/crates/grpcio-sys/grpc/third_party/cares/cares/test/gmock-1.8.0/gmock/
Dgmock.h12821 typename M6, typename M7>
12825 typename AllOfResult4<M4, M5, M6, M7>::type
12830 typename M6, typename M7, typename M8>
12834 typename AllOfResult4<M5, M6, M7, M8>::type
12839 typename M6, typename M7, typename M8, typename M9>
12843 typename AllOfResult5<M5, M6, M7, M8, M9>::type
12848 typename M6, typename M7, typename M8, typename M9, typename M10>
12852 typename AllOfResult5<M6, M7, M8, M9, M10>::type
12909 typename M6, typename M7>
12913 typename AnyOfResult4<M4, M5, M6, M7>::type
[all …]
/external/tensorflow/tensorflow/lite/micro/examples/image_recognition_experimental/
DREADME.md24 [STM32F746G-DISCO board (Cortex-M7)](https://www.st.com/en/evaluation-tools/32f746gdiscovery.html)
/external/ImageMagick/PerlMagick/t/reference/write/filter/
DScale.miff43 …2H�S\�<;�7*�@:�D?�:.�7/�?8�1/�//�9-�tr�k~�DaP?v�_~�j}�f~�g��p���^N<^N<^N;^M7`XXvp�ru���˹���^P�AD�…

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