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Searched refs:VLD (Results 1 – 25 of 30) sorted by relevance

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/external/skia/src/gpu/
DGrVx.h121 #define IMPL_LOAD4_TRANSPOSED(N, T, VLD) \ argument
125 auto mat = VLD(v); \
180 #define IMPL_LOAD2_TRANSPOSED(N, T, VLD) \ argument
183 auto mat = VLD(v); \
/external/llvm-project/llvm/test/CodeGen/VE/VELIntrinsics/
Dvbrd.ll6 ;;; We test VLD*rrl, VLD*irl, VLD*rrl_v, and VLD*irl_v instructions.
Dvld.ll6 ;;; We test VLD*rrl, VLD*irl, VLD*rrl_v, VLD*irl_v
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64Schedule.td85 // Read the unwritten lanes of the VLD's destination registers.
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64Schedule.td85 // Read the unwritten lanes of the VLD's destination registers.
/external/llvm/lib/Target/AArch64/
DAArch64Schedule.td97 // Read the unwritten lanes of the VLD's destination registers.
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMScheduleM4.td114 def : M4UnitL2I<(instregex "VLD")>;
DARMInstrInfo.td1183 // VLD/VST instructions and checking the alignment is not specified.
1194 // VLD/VST instructions and checking the alignment value.
1205 // VLD/VST instructions and checking the alignment value.
1216 // VLD/VST instructions and checking the alignment value.
1227 // for VLD/VST instructions and checking the alignment value.
1238 // encoding for VLD/VST instructions and checking the alignment value.
1248 // Special version of addrmode6 to handle alignment encoding for VLD-dup
1269 // VLD-dup instruction and checking the alignment is not specified.
1279 // Special version of addrmode6 to handle 16-bit alignment encoding for VLD-dup
1290 // Special version of addrmode6 to handle 32-bit alignment encoding for VLD-dup
[all …]
DARMScheduleA57.td157 "VLD(1|2)LN(d|q)(WB_fixed_|WB_register_)?Asm",
158 "VLD(3|4)(DUP|LN)?(d|q)(WB_fixed_|WB_register_)?Asm",
DARMISelLowering.cpp13308 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local
13309 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP()
13313 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP()
13330 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP()
13331 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
13349 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP()
13350 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP()
13351 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP()
13356 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
13372 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
DARMInstrNEON.td579 // Classes for VLD* pseudo-instructions with multi-register operands.
1005 // Classes for VLD*LN pseudo-instructions with multi-register operands.
/external/llvm-project/llvm/lib/Target/ARM/
DARMScheduleM4.td114 def : M4UnitL2I<(instregex "VLD")>;
DARMInstrInfo.td1298 // VLD/VST instructions and checking the alignment is not specified.
1309 // VLD/VST instructions and checking the alignment value.
1320 // VLD/VST instructions and checking the alignment value.
1331 // VLD/VST instructions and checking the alignment value.
1342 // for VLD/VST instructions and checking the alignment value.
1353 // encoding for VLD/VST instructions and checking the alignment value.
1363 // Special version of addrmode6 to handle alignment encoding for VLD-dup
1384 // VLD-dup instruction and checking the alignment is not specified.
1394 // Special version of addrmode6 to handle 16-bit alignment encoding for VLD-dup
1405 // Special version of addrmode6 to handle 32-bit alignment encoding for VLD-dup
[all …]
DARMScheduleA57.td145 "VLD(1|2)LN(d|q)(WB_fixed_|WB_register_)?Asm",
146 "VLD(3|4)(DUP|LN)?(d|q)(WB_fixed_|WB_register_)?Asm",
DARMISelLowering.cpp14393 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local
14394 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP()
14398 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP()
14415 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP()
14416 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
14434 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP()
14435 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP()
14436 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP()
14441 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
14457 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
DARMInstrNEON.td555 // Classes for VLD* pseudo-instructions with multi-register operands.
981 // Classes for VLD*LN pseudo-instructions with multi-register operands.
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td1050 // VLD/VST instructions and checking the alignment is not specified.
1061 // VLD/VST instructions and checking the alignment value.
1072 // VLD/VST instructions and checking the alignment value.
1083 // VLD/VST instructions and checking the alignment value.
1094 // for VLD/VST instructions and checking the alignment value.
1105 // encoding for VLD/VST instructions and checking the alignment value.
1115 // Special version of addrmode6 to handle alignment encoding for VLD-dup
1136 // VLD-dup instruction and checking the alignment is not specified.
1146 // Special version of addrmode6 to handle 16-bit alignment encoding for VLD-dup
1157 // Special version of addrmode6 to handle 32-bit alignment encoding for VLD-dup
[all …]
DARMISelLowering.cpp10120 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP() local
10121 if (VLD->getOpcode() != ISD::INTRINSIC_W_CHAIN) in CombineVLDDUP()
10125 unsigned IntNo = cast<ConstantSDNode>(VLD->getOperand(1))->getZExtValue(); in CombineVLDDUP()
10142 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue(); in CombineVLDDUP()
10143 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
10161 SDValue Ops[] = { VLD->getOperand(0), VLD->getOperand(2) }; in CombineVLDDUP()
10162 MemIntrinsicSDNode *VLDMemInt = cast<MemIntrinsicSDNode>(VLD); in CombineVLDDUP()
10163 SDValue VLDDup = DAG.getMemIntrinsicNode(NewOpc, SDLoc(VLD), SDTys, in CombineVLDDUP()
10168 for (SDNode::use_iterator UI = VLD->use_begin(), UE = VLD->use_end(); in CombineVLDDUP()
10184 DCI.CombineTo(VLD, VLDDupResults); in CombineVLDDUP()
DARMInstrNEON.td622 // Classes for VLD* pseudo-instructions with multi-register operands.
1023 // Classes for VLD*LN pseudo-instructions with multi-register operands.
/external/llvm-project/llvm/lib/Target/VE/
DVEInstrVec.td84 // Multiclass for VLD instructions
118 // Section 8.9.1 - VLD (Vector Load)
119 defm VLD : VLDm<"vld", 0x81, V64>;
/external/capstone/arch/ARM/
DARMGenAsmWriter.inc6486 // VEXTq64, VLD1d64, VLD1d64Q, VLD1d64Qwb_fixed, VLD1d64Qwb_register, VLD...
6840 // VLD1DUPd16, VLD1DUPd16wb_fixed, VLD1DUPd16wb_register, VLD1DUPd32, VLD...
6845 // VLD1DUPq16, VLD1DUPq16wb_fixed, VLD1DUPq16wb_register, VLD1DUPq32, VLD...
7179 // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD...
7416 // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD...
7436 // VLD4DUPd16, VLD4DUPd16_UPD, VLD4DUPd32, VLD4DUPd32_UPD, VLD4DUPd8, VLD...
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenAsmWriter.inc10074 // VLD1DUPd16, VLD1DUPd16wb_fixed, VLD1DUPd16wb_register, VLD1DUPd32, VLD...
10079 // VLD1DUPq16, VLD1DUPq16wb_fixed, VLD1DUPq16wb_register, VLD1DUPq32, VLD...
10395 // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD...
10706 // VLD3DUPd16, VLD3DUPd16_UPD, VLD3DUPd32, VLD3DUPd32_UPD, VLD3DUPd8, VLD...
10722 // VLD4DUPd16, VLD4DUPd16_UPD, VLD4DUPd32, VLD4DUPd32_UPD, VLD4DUPd8, VLD...
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
D2013-1_UNLOCODE_CodeListPart3.csv3771 ,"PT","VLD","Vila da Ponte","Vila da Ponte","18","--3-----","RL","0401",,"4055N 00730W",
5251 ,"RU","VLD","Volodarsk","Volodarsk","NIZ","--3-----","RQ","1001",,"5613N 04311E",
7157 "+","SE","VLD","Vallda","Vallda","N","--3-----","RL","1301",,"5728N 01200E",
7809 "+","SK","VLD","Vel'K� Ida","Vel'Ka Ida","KI","--3-----","RL","1301",,"4836N 02110E",
25809 ,"US","VLD","Valdosta","Valdosta","GA","--34----","AI","9601",,,
D2013-1_UNLOCODE_CodeListPart2.csv9404 ,"IN","VLD","Dishman-Pharmaceutical-SEZ/Kalyangadh","Dishman-Pharmaceutical-SEZ/Kalyangadh","GJ","-…
15485 ,"IT","VLD","Villa di Serio","Villa di Serio",,"--3-----","RQ","9704",,,
21959 ,"NL","VLD","Vlodrop","Vlodrop",,"--3-----","AF","9602",,,
D2013-1_UNLOCODE_CodeListPart1.csv732 ,"AR","VLD","Villa Dominico","Villa Dominico","B","-----6--","RL","1107",,"3441S 05819W",
26019 ,"DK","VLD","Vildbjerg","Vildbjerg","65","--3-----","RQ","0901",,,
27435 "X","EE","VLD","Veeleidi","Veeleidi",,"1-------","XX","1301",,"5934N 02539E",""
31181 ,"ES","VLD","Vilada","Vilada",,"--3-----","RL","0701",,"4208N 00156E",""
43292 ,"FR","VLD","Villaz","Villaz","74","--3-----","RL","0601",,"4557N 00611E",

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