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/external/llvm-project/polly/test/ScopDetect/
Dprofitability-large-basic-blocks.ll31 %tmp8 = fadd float %tmp7, %tmp5
32 %val0 = fadd float %tmp7, 1.0
33 %val1 = fadd float %val0, 1.0
34 %val2 = fadd float %val1, 1.0
35 %val3 = fadd float %val2, 1.0
36 %val4 = fadd float %val3, 1.0
37 %val5 = fadd float %val4, 1.0
38 %val6 = fadd float %val5, 1.0
39 %val7 = fadd float %val6, 1.0
40 %val8 = fadd float %val7, 1.0
[all …]
/external/llvm-project/llvm/test/Bitcode/
DbinaryFloatInstructions.3.2.ll8 define void @fadd(float %x1, double %x2 ,half %x3, fp128 %x4, x86_fp80 %x5, ppc_fp128 %x6){
10 ; CHECK: %res1 = fadd float %x1, %x1
11 %res1 = fadd float %x1, %x1
13 ; CHECK-NEXT: %res2 = fadd double %x2, %x2
14 %res2 = fadd double %x2, %x2
16 ; CHECK-NEXT: %res3 = fadd half %x3, %x3
17 %res3 = fadd half %x3, %x3
19 ; CHECK-NEXT: %res4 = fadd fp128 %x4, %x4
20 %res4 = fadd fp128 %x4, %x4
22 ; CHECK-NEXT: %res5 = fadd x86_fp80 %x5, %x5
[all …]
/external/llvm/test/Bitcode/
DbinaryFloatInstructions.3.2.ll8 define void @fadd(float %x1, double %x2 ,half %x3, fp128 %x4, x86_fp80 %x5, ppc_fp128 %x6){
10 ; CHECK: %res1 = fadd float %x1, %x1
11 %res1 = fadd float %x1, %x1
13 ; CHECK-NEXT: %res2 = fadd double %x2, %x2
14 %res2 = fadd double %x2, %x2
16 ; CHECK-NEXT: %res3 = fadd half %x3, %x3
17 %res3 = fadd half %x3, %x3
19 ; CHECK-NEXT: %res4 = fadd fp128 %x4, %x4
20 %res4 = fadd fp128 %x4, %x4
22 ; CHECK-NEXT: %res5 = fadd x86_fp80 %x5, %x5
[all …]
/external/llvm-project/llvm/test/Transforms/Reassociate/
Dfast-ArrayOutOfBounds.ll6 ; CHECK-NEXT: %tmp.2 = fadd float %a3, %a4
7 ; CHECK-NEXT: %tmp.4 = fadd float %tmp.2, %a2
8 ; CHECK-NEXT: %tmp.6 = fadd float %tmp.4, %a1
9 ; CHECK-NEXT: %tmp.8 = fadd float %tmp.6, %a0
10 ; CHECK-NEXT: %tmp.11 = fadd float %a2, %a3
11 ; CHECK-NEXT: %tmp.13 = fadd float %tmp.11, %a1
12 ; CHECK-NEXT: %tmp.15 = fadd float %tmp.13, %a0
13 ; CHECK-NEXT: %tmp.18 = fadd float %a1, %a2
14 ; CHECK-NEXT: %tmp.20 = fadd float %tmp.18, %a0
15 ; CHECK-NEXT: %tmp.23 = fadd float %a0, %a1
[all …]
Dfast-SubReassociate.ll6 ; CHECK-NEXT: [[W:%.*]] = fadd float [[B:%.*]], 5.000000e+00
7 ; CHECK-NEXT: [[X:%.*]] = fadd float [[A:%.*]], -7.000000e+00
9 ; CHECK-NEXT: [[Z:%.*]] = fadd float [[Y]], 1.200000e+01
12 %W = fadd float 5.0, %B
13 %X = fadd float -7.0, %A
15 %Z = fadd float %Y, 12.0
25 %W = fadd fast float %B, 5.000000e+00
26 %X = fadd fast float %A, -7.000000e+00
28 %Z = fadd fast float %Y, 1.200000e+01
39 %W = fadd reassoc nsz float %B, 5.000000e+00
[all …]
Dfast-MissedTree.ll5 ; CHECK-NEXT: [[Z:%.*]] = fadd fast float %A, %B
8 %W = fadd fast float %B, -5.0
9 %Y = fadd fast float %A, 5.0
10 %Z = fadd fast float %W, %Y
18 ; CHECK-NEXT: [[Z:%.*]] = fadd reassoc nsz float %A, %B
21 %W = fadd reassoc nsz float %B, -5.0
22 %Y = fadd reassoc nsz float %A, 5.0
23 %Z = fadd reassoc nsz float %W, %Y
30 ; CHECK-NEXT: [[W:%.*]] = fadd reassoc float %B, -5.000000e+00
31 ; CHECK-NEXT: [[Y:%.*]] = fadd reassoc float %A, 5.000000e+00
[all …]
/external/llvm/test/Transforms/Reassociate/
Dfast-ArrayOutOfBounds.ll6 ; CHECK-NEXT: %tmp.2 = fadd float %a3, %a4
7 ; CHECK-NEXT: %tmp.4 = fadd float %tmp.2, %a2
8 ; CHECK-NEXT: %tmp.6 = fadd float %tmp.4, %a1
9 ; CHECK-NEXT: %tmp.8 = fadd float %tmp.6, %a0
10 ; CHECK-NEXT: %tmp.11 = fadd float %a2, %a3
11 ; CHECK-NEXT: %tmp.13 = fadd float %tmp.11, %a1
12 ; CHECK-NEXT: %tmp.15 = fadd float %tmp.13, %a0
13 ; CHECK-NEXT: %tmp.18 = fadd float %a1, %a2
14 ; CHECK-NEXT: %tmp.20 = fadd float %tmp.18, %a0
15 ; CHECK-NEXT: %tmp.23 = fadd float %a0, %a1
[all …]
Dfast-SubReassociate.ll5 ; CHECK-NEXT: %W = fadd float %B, 5.000000e+00
6 ; CHECK-NEXT: %X = fadd float %A, -7.000000e+00
8 ; CHECK-NEXT: %Z = fadd float %Y, 1.200000e+01
11 %W = fadd float 5.0, %B
12 %X = fadd float -7.0, %A
14 %Z = fadd float %Y, 12.0
24 %W = fadd fast float %B, 5.000000e+00
25 %X = fadd fast float %A, -7.000000e+00
27 %Z = fadd fast float %Y, 1.200000e+01
34 ; CHECK-NEXT: %M = fadd float %A, 1.200000e+01
[all …]
Dfast-basictest.ll10 %tmp2 = fadd fast float %tmp1, 1.200000e+01
16 ; CHECK-NEXT: fadd float %reg109, -3.000000e+01
17 ; CHECK-NEXT: fadd float %reg115, %reg1111
18 ; CHECK-NEXT: fadd float %reg116, 3.000000e+01
21 %reg115 = fadd float %reg109, -3.000000e+01
22 %reg116 = fadd float %reg115, %reg1111
23 %reg117 = fadd float %reg116, 3.000000e+01
29 ; CHECK-NEXT: %reg117 = fadd fast float %reg109, %reg1111
32 %reg115 = fadd fast float %reg109, -3.000000e+01
33 %reg116 = fadd fast float %reg115, %reg1111
[all …]
/external/llvm/test/CodeGen/AArch64/
Dmachine-combiner.ll8 ; CHECK: fadd s0, s0, s1
9 ; CHECK-NEXT: fadd s1, s2, s3
10 ; CHECK-NEXT: fadd s0, s0, s1
12 %t0 = fadd float %x0, %x1
13 %t1 = fadd float %t0, %x2
14 %t2 = fadd float %t1, %x3
20 ; CHECK: fadd s0, s0, s1
21 ; CHECK-NEXT: fadd s1, s2, s3
22 ; CHECK-NEXT: fadd s0, s0, s1
24 %t0 = fadd float %x0, %x1
[all …]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dmachine-combiner.ll13 ; CHECK: fadd s0, s0, s1
14 ; CHECK-NEXT: fadd s1, s2, s3
15 ; CHECK-NEXT: fadd s0, s0, s1
17 %t0 = fadd float %x0, %x1
18 %t1 = fadd float %t0, %x2
19 %t2 = fadd float %t1, %x3
25 ; CHECK: fadd s0, s0, s1
26 ; CHECK-NEXT: fadd s1, s2, s3
27 ; CHECK-NEXT: fadd s0, s0, s1
29 %t0 = fadd float %x0, %x1
[all …]
Dvecreduce-fadd-legalization-strict.ll4 ; Same as vecreduce-fadd-legalization.ll, but without fmf.
6 declare half @llvm.vector.reduce.fadd.f16.v1f16(half, <1 x half>)
7 declare float @llvm.vector.reduce.fadd.f32.v1f32(float, <1 x float>)
8 declare double @llvm.vector.reduce.fadd.f64.v1f64(double, <1 x double>)
9 declare fp128 @llvm.vector.reduce.fadd.f128.v1f128(fp128, <1 x fp128>)
11 declare float @llvm.vector.reduce.fadd.f32.v3f32(float, <3 x float>)
12 declare float @llvm.vector.reduce.fadd.f32.v5f32(float, <5 x float>)
13 declare fp128 @llvm.vector.reduce.fadd.f128.v2f128(fp128, <2 x fp128>)
14 declare float @llvm.vector.reduce.fadd.f32.v16f32(float, <16 x float>)
21 ; CHECK-NEXT: fadd s0, s1, s0
[all …]
Dvecreduce-fadd.ll17 %r = call fast float @llvm.vector.reduce.fadd.f32.v2f32(float -0.0, <2 x float> %bin.rdx)
28 ; CHECK-NEXT: fadd h0, h0, h2
29 ; CHECK-NEXT: fadd h0, h0, h1
40 ; CHECKNOFP16-NEXT: fadd s0, s0, s3
44 ; CHECKNOFP16-NEXT: fadd s0, s0, s2
48 ; CHECKNOFP16-NEXT: fadd s0, s0, s1
51 %r = call fast half @llvm.vector.reduce.fadd.f16.v4f16(half -0.0, <4 x half> %bin.rdx)
60 ; CHECK-NEXT: fadd v0.4h, v0.4h, v1.4h
63 ; CHECK-NEXT: fadd h1, h2, h1
65 ; CHECK-NEXT: fadd h0, h1, h0
[all …]
/external/llvm-project/llvm/test/CodeGen/PowerPC/
DVSX-DForm-Scalars.ll16 %add = fadd double %a, %b
17 %add1 = fadd double %add, %c
18 %add2 = fadd double %add1, %d
19 %add3 = fadd double %add2, %e
20 %add4 = fadd double %add3, %f
21 %add5 = fadd double %add4, %g
22 %add6 = fadd double %add5, %h
23 %add7 = fadd double %add6, %i
24 %add8 = fadd double %add7, %j
25 %add9 = fadd double %add8, %k
[all …]
Dmachine-combiner.ll17 %t0 = fadd reassoc nsz float %x0, %x1
18 %t1 = fadd reassoc nsz float %t0, %x2
19 %t2 = fadd reassoc nsz float %t1, %x3
31 %t0 = fadd reassoc nsz float %x0, %x1
32 %t1 = fadd reassoc nsz float %x2, %t0
33 %t2 = fadd reassoc nsz float %t1, %x3
45 %t0 = fadd reassoc nsz float %x0, %x1
46 %t1 = fadd reassoc nsz float %t0, %x2
47 %t2 = fadd reassoc nsz float %x3, %t1
59 %t0 = fadd reassoc nsz float %x0, %x1
[all …]
/external/llvm/test/Transforms/GVN/
Dfpmath.ll5 ; CHECK: %add1 = fadd double %x, %y
7 ; CHECK: %foo = fadd double %add1, %add1
8 %add1 = fadd double %x, %y, !fpmath !0
9 %add2 = fadd double %x, %y
10 %foo = fadd double %add1, %add2
16 ; CHECK: %add1 = fadd double %x, %y, !fpmath !0
17 ; CHECK: %foo = fadd double %add1, %add1
18 %add1 = fadd double %x, %y, !fpmath !0
19 %add2 = fadd double %x, %y, !fpmath !0
20 %foo = fadd double %add1, %add2
[all …]
/external/llvm-project/llvm/test/Transforms/GVN/
Dfpmath.ll5 ; CHECK: %add1 = fadd double %x, %y
7 ; CHECK: %foo = fadd double %add1, %add1
8 %add1 = fadd double %x, %y, !fpmath !0
9 %add2 = fadd double %x, %y
10 %foo = fadd double %add1, %add2
16 ; CHECK: %add1 = fadd double %x, %y, !fpmath !0
17 ; CHECK: %foo = fadd double %add1, %add1
18 %add1 = fadd double %x, %y, !fpmath !0
19 %add2 = fadd double %x, %y, !fpmath !0
20 %foo = fadd double %add1, %add2
[all …]
/external/llvm-project/llvm/test/Transforms/NewGVN/
Dfpmath.ll5 ; CHECK: %add1 = fadd double %x, %y
7 ; CHECK: %foo = fadd double %add1, %add1
8 %add1 = fadd double %x, %y, !fpmath !0
9 %add2 = fadd double %x, %y
10 %foo = fadd double %add1, %add2
16 ; CHECK: %add1 = fadd double %x, %y, !fpmath ![[MD0:[0-9]+]]
17 ; CHECK: %foo = fadd double %add1, %add1
18 %add1 = fadd double %x, %y, !fpmath !0
19 %add2 = fadd double %x, %y, !fpmath !0
20 %foo = fadd double %add1, %add2
[all …]
/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dfadd.s10 fadd z0.h, p0/m, z0.h, #0.500000000000000 label
16 fadd z0.h, p0/m, z0.h, #0.5 label
22 fadd z0.s, p0/m, z0.s, #0.5 label
28 fadd z0.d, p0/m, z0.d, #0.5 label
34 fadd z31.h, p7/m, z31.h, #1.000000000000000 label
40 fadd z31.h, p7/m, z31.h, #1.0 label
46 fadd z31.s, p7/m, z31.s, #1.0 label
52 fadd z31.d, p7/m, z31.d, #1.0 label
58 fadd z0.h, p7/m, z0.h, z31.h label
64 fadd z0.s, p7/m, z0.s, z31.s label
[all …]
Dfadd-diagnostics.s6 fadd z0.h, p0/m, z0.h, #0.0 label
11 fadd z0.h, p0/m, z0.h, #0.4999999999999999999999999 label
16 fadd z0.h, p0/m, z0.h, #0.5000000000000000000000001 label
21 fadd z0.h, p0/m, z0.h, #1.0000000000000000000000001 label
26 fadd z0.h, p0/m, z0.h, #0.9999999999999999999999999 label
35 fadd z0.h, p7/m, z1.h, z31.h label
44 fadd z0.b, p7/m, z0.b, z31.b label
49 fadd z0.h, p7/m, z0.h, z31.s label
54 fadd z0.b, z1.b, z2.b label
59 fadd z0.h, z1.s, z2.s label
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dnsa-reassign.ll8 %zcompare.1 = fadd float %zcompare, 1.0
9 %s1.1 = fadd float %s1, 1.0
10 %t1.1 = fadd float %t1, 1.0
11 %r1.1 = fadd float %r1, 1.0
12 %s2.1 = fadd float %s2, 1.0
13 %t2.1 = fadd float %t2, 1.0
14 %r2.1 = fadd float %r2, 1.0
15 %lod.1 = fadd float %lod, 1.0
28 %zcompare.1 = fadd float %zcompare, 1.0
29 %s1.1 = fadd float %s1, 1.0
[all …]
/external/llvm-project/llvm/test/Transforms/Inline/AMDGPU/
Damdgpu-inline-alloca-argument.ll9 %add0 = fadd float %div, 1.0
10 %add1 = fadd float %add0, 1.0
11 %add2 = fadd float %add1, 1.0
12 %add3 = fadd float %add2, 1.0
13 %add4 = fadd float %add3, 1.0
14 %add5 = fadd float %add4, 1.0
15 %add6 = fadd float %add5, 1.0
16 %add7 = fadd float %add6, 1.0
17 %add8 = fadd float %add7, 1.0
18 %add9 = fadd float %add8, 1.0
[all …]
/external/llvm-project/llvm/test/Analysis/CostModel/AMDGPU/
Dfneg.ll8 %fadd = fadd float %vec, undef
9 %fneg = fneg float %fadd
18 %fadd = fadd <2 x float> %vec, undef
19 %fneg = fneg <2 x float> %fadd
28 %fadd = fadd <3 x float> %vec, undef
29 %fneg = fneg <3 x float> %fadd
38 %fadd = fadd <5 x float> %vec, undef
39 %fneg = fneg <5 x float> %fadd
48 %fadd = fadd double %vec, undef
49 %fneg = fneg double %fadd
[all …]
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Dreduce-fadd.ll14 …stimated cost of 0 for instruction: %V1 = call double @llvm.vector.reduce.fadd.v1f64(double %arg, …
15 …stimated cost of 2 for instruction: %V2 = call double @llvm.vector.reduce.fadd.v2f64(double %arg, …
16 …stimated cost of 4 for instruction: %V4 = call double @llvm.vector.reduce.fadd.v4f64(double %arg, …
17 …stimated cost of 8 for instruction: %V8 = call double @llvm.vector.reduce.fadd.v8f64(double %arg, …
18 …imated cost of 16 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg,…
22 …stimated cost of 0 for instruction: %V1 = call double @llvm.vector.reduce.fadd.v1f64(double %arg, …
23 …stimated cost of 2 for instruction: %V2 = call double @llvm.vector.reduce.fadd.v2f64(double %arg, …
24 …stimated cost of 4 for instruction: %V4 = call double @llvm.vector.reduce.fadd.v4f64(double %arg, …
25 …stimated cost of 8 for instruction: %V8 = call double @llvm.vector.reduce.fadd.v8f64(double %arg, …
26 …imated cost of 16 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg,…
[all …]
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dpr19657.ll9 ; CHECK: fadd <4 x double>
10 ; CHECK: fadd <4 x double>
15 ; V128: fadd <2 x double>
16 ; V128: fadd <2 x double>
19 ; V128: fadd <2 x double>
20 ; V128: fadd <2 x double>
25 %2 = fadd double %1, %1
26 %3 = fadd double %2, %1
30 %6 = fadd double %5, %5
31 %7 = fadd double %6, %5
[all …]

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