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Searched refs:nxv4f16 (Results 1 – 25 of 35) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-fp-rounding.ll22 %res = call <vscale x 4 x half> @llvm.ceil.nxv4f16(<vscale x 4 x half> %a)
84 %res = call <vscale x 4 x half> @llvm.floor.nxv4f16(<vscale x 4 x half> %a)
146 %res = call <vscale x 4 x half> @llvm.nearbyint.nxv4f16(<vscale x 4 x half> %a)
208 %res = call <vscale x 4 x half> @llvm.rint.nxv4f16(<vscale x 4 x half> %a)
270 %res = call <vscale x 4 x half> @llvm.round.nxv4f16(<vscale x 4 x half> %a)
332 %res = call <vscale x 4 x half> @llvm.roundeven.nxv4f16(<vscale x 4 x half> %a)
394 %res = call <vscale x 4 x half> @llvm.trunc.nxv4f16(<vscale x 4 x half> %a)
439 declare <vscale x 4 x half> @llvm.ceil.nxv4f16( <vscale x 4 x half>)
446 declare <vscale x 4 x half> @llvm.floor.nxv4f16( <vscale x 4 x half>)
453 declare <vscale x 4 x half> @llvm.nearbyint.nxv4f16( <vscale x 4 x half>)
[all …]
Dsve-fp.ll257 …%r = call <vscale x 4 x half> @llvm.fma.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b, <v…
489 %res = call <vscale x 4 x half> @llvm.sqrt.nxv4f16(<vscale x 4 x half> %a)
551 %res = call <vscale x 4 x half> @llvm.fabs.nxv4f16(<vscale x 4 x half> %a)
624 …%res = call <vscale x 4 x half> @llvm.maxnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %…
717 …%res = call <vscale x 4 x half> @llvm.minnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %…
795 declare <vscale x 4 x half> @llvm.fma.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>, <vscale x 4…
799 declare <vscale x 4 x half> @llvm.sqrt.nxv4f16( <vscale x 4 x half>)
806 declare <vscale x 4 x half> @llvm.fabs.nxv4f16( <vscale x 4 x half>)
814 declare <vscale x 4 x half> @llvm.maxnum.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
823 declare <vscale x 4 x half> @llvm.minnum.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
Dsve-masked-ldst-nonext.ll79 …%load = call <vscale x 4 x half> @llvm.masked.load.nxv4f16(<vscale x 4 x half> *%a, i32 2, <vscale…
171 …call void @llvm.masked.store.nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x half> *%a, i32 2, <vs…
288 declare <vscale x 4 x half> @llvm.masked.load.nxv4f16(<vscale x 4 x half>*, i32, <vscale x 4 x i1>,…
301 declare void @llvm.masked.store.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>*, i32, <vscale x 4…
Dsve-masked-gather-32b-signed-scaled.ll124 …%vals = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16(<vscale x 4 x half*> %ptrs, i32 2, <v…
158 declare <vscale x 4 x half> @llvm.masked.gather.nxv4f16(<vscale x 4 x half*>, i32, <vscale x 4 x i1…
Dsve-masked-scatter-32b-scaled.ll195 …call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x half*> %ptrs, i32 …
250 …call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x half*> %ptrs, i32 …
277 declare void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half*>, i32, <vscale x…
Dsve-masked-gather-32b-unsigned-scaled.ll135 …%vals = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16(<vscale x 4 x half*> %ptrs, i32 2, <v…
171 declare <vscale x 4 x half> @llvm.masked.gather.nxv4f16(<vscale x 4 x half*>, i32, <vscale x 4 x i1…
Dsve-masked-scatter-32b-unscaled.ll247 …call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x half*> %ptrs, i32 …
319 …call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x half*> %ptrs, i32 …
348 declare void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half*>, i32, <vscale x…
Dsve-masked-gather-32b-signed-unscaled.ll168 …%vals = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16(<vscale x 4 x half*> %ptrs, i32 2, <v…
217 declare <vscale x 4 x half> @llvm.masked.gather.nxv4f16(<vscale x 4 x half*>, i32, <vscale x 4 x i1…
Dsve-pred-contiguous-ldst-addressing-mode-reg-reg.ll329 %data = call <vscale x 4 x half> @llvm.masked.load.nxv4f16(<vscale x 4 x half>* %base_addr,
333 call void @llvm.masked.store.nxv4f16(<vscale x 4 x half> %data,
599 declare <vscale x 4 x half> @llvm.masked.load.nxv4f16(<vscale x 4 x half>*, i32, <vscale x 4 x i1>,…
624 declare void @llvm.masked.store.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>*, i32, <vscale x 4…
Dsve-pred-contiguous-ldst-addressing-mode-reg-imm.ll348 %data = call <vscale x 4 x half> @llvm.masked.load.nxv4f16(<vscale x 4 x half>* %base_load,
353 call void @llvm.masked.store.nxv4f16(<vscale x 4 x half> %data,
611 declare <vscale x 4 x half> @llvm.masked.load.nxv4f16(<vscale x 4 x half>*, i32, <vscale x 4 x i1>,…
636 declare void @llvm.masked.store.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>*, i32, <vscale x 4…
Dsve-masked-scatter-64b-unscaled.ll97 declare void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half*>, i32, <vscale x…
Dsve-masked-gather-32b-unsigned-unscaled.ll182 …%vals = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16(<vscale x 4 x half*> %ptrs, i32 2, <v…
234 declare <vscale x 4 x half> @llvm.masked.gather.nxv4f16(<vscale x 4 x half*>, i32, <vscale x 4 x i1…
Dsve-intrinsics-perm-select.ll1284 %out = call <vscale x 4 x half> @llvm.aarch64.sve.trn1.nxv4f16(<vscale x 4 x half> %a,
1405 %out = call <vscale x 4 x half> @llvm.aarch64.sve.trn2.nxv4f16(<vscale x 4 x half> %a,
1526 %out = call <vscale x 4 x half> @llvm.aarch64.sve.uzp1.nxv4f16(<vscale x 4 x half> %a,
1647 %out = call <vscale x 4 x half> @llvm.aarch64.sve.uzp2.nxv4f16(<vscale x 4 x half> %a,
1768 %out = call <vscale x 4 x half> @llvm.aarch64.sve.zip1.nxv4f16(<vscale x 4 x half> %a,
1889 %out = call <vscale x 4 x half> @llvm.aarch64.sve.zip2.nxv4f16(<vscale x 4 x half> %a,
2064 declare <vscale x 4 x half> @llvm.aarch64.sve.trn1.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
2078 declare <vscale x 4 x half> @llvm.aarch64.sve.trn2.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
2092 declare <vscale x 4 x half> @llvm.aarch64.sve.uzp1.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
2106 declare <vscale x 4 x half> @llvm.aarch64.sve.uzp2.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h189 nxv4f16 = 119, // n x 4 x f16 enumerator
515 case nxv4f16: in getVectorElementType()
629 case nxv4f16: in getVectorNumElements()
749 case nxv4f16: in getSizeInBits()
1064 if (NumElements == 4) return MVT::nxv4f16; in getScalableVectorVT()
/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h211 nxv4f16 = 141, // n x 4 x f16 enumerator
590 case nxv4f16: in getVectorElementType()
743 case nxv4f16: in getVectorNumElements()
880 case nxv4f16: in getSizeInBits()
1274 if (NumElements == 4) return MVT::nxv4f16; in getScalableVectorVT()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td472 def : Pat<(nxv4f16 (AArch64fma_p nxv4i1:$P, nxv4f16:$Op1, nxv4f16:$Op2, nxv4f16:$Op3)),
525 def : Pat<(nxv4f16 (AArch64dup (f16 FPR16:$src))),
542 def : Pat<(nxv4f16 (AArch64dup (f16 fpimm0))), (DUP_ZI_H 0, 0)>;
565 def : Pat<(nxv4f16 (AArch64dup fpimm16:$imm8)),
1189 def : Pat<(nxv2f16 (extract_subvector (nxv4f16 ZPR:$Zs), (i64 0))),
1191 def : Pat<(nxv2f16 (extract_subvector (nxv4f16 ZPR:$Zs), (i64 2))),
1201 def : Pat<(nxv4f16 (extract_subvector (nxv8f16 ZPR:$Zs), (i64 0))),
1203 def : Pat<(nxv4f16 (extract_subvector (nxv8f16 ZPR:$Zs), (i64 4))),
1219 def : Pat<(nxv4f16 (concat_vectors nxv2f16:$v1, nxv2f16:$v2)),
1221 def : Pat<(nxv8f16 (concat_vectors nxv4f16:$v1, nxv4f16:$v2)),
[all …]
DAArch64CallingConvention.td74 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16,
77 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16,
158 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16,
/external/llvm-project/llvm/lib/Target/RISCV/Utils/
DRISCVBaseInfo.h307 constexpr MVT vfloat16m1_t = MVT::nxv4f16;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td77 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16,
80 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16,
157 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp295 case MVT::nxv4f16: in getTypeForEVT()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td152 def nxv4f16 : ValueType<64 , 119>; // n x 4 x f16 vector value
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenCallingConv.inc153 LocVT == MVT::nxv4f16 ||
172 LocVT == MVT::nxv4f16 ||
1159 LocVT == MVT::nxv4f16 ||
/external/llvm-project/llvm/include/llvm/CodeGen/
DValueTypes.td175 def nxv4f16 : ValueType<64 , 141>; // n x 4 x f16 vector value
/external/llvm-project/llvm/lib/CodeGen/
DValueTypes.cpp450 case MVT::nxv4f16: in getTypeForEVT()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVRegisterInfo.td288 // half N/A nxv1f16 nxv2f16 nxv4f16 nxv8f16 nxv16f16 nxv32f16

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