1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s 3 4;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 5; unscaled unpacked 32-bit offsets 6;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 7 8define void @masked_scatter_nxv2i8_sext_offsets(<vscale x 2 x i8> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 9; CHECK-LABEL: masked_scatter_nxv2i8_sext_offsets: 10; CHECK: // %bb.0: 11; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d, sxtw] 12; CHECK-NEXT: ret 13 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 14 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 15 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x i8*> 16 call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i8*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 17 ret void 18} 19 20define void @masked_scatter_nxv2i16_sext_offsets(<vscale x 2 x i16> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 21; CHECK-LABEL: masked_scatter_nxv2i16_sext_offsets: 22; CHECK: // %bb.0: 23; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw] 24; CHECK-NEXT: ret 25 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 26 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 27 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x i16*> 28 call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i16*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 29 ret void 30} 31 32define void @masked_scatter_nxv2i32_sext_offsets(<vscale x 2 x i32> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 33; CHECK-LABEL: masked_scatter_nxv2i32_sext_offsets: 34; CHECK: // %bb.0: 35; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, sxtw] 36; CHECK-NEXT: ret 37 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 38 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 39 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x i32*> 40 call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i32*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 41 ret void 42} 43 44define void @masked_scatter_nxv2i64_sext_offsets(<vscale x 2 x i64> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 45; CHECK-LABEL: masked_scatter_nxv2i64_sext_offsets: 46; CHECK: // %bb.0: 47; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, sxtw] 48; CHECK-NEXT: ret 49 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 50 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 51 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x i64*> 52 call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i64*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 53 ret void 54} 55 56define void @masked_scatter_nxv2f16_sext_offsets(<vscale x 2 x half> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 57; CHECK-LABEL: masked_scatter_nxv2f16_sext_offsets: 58; CHECK: // %bb.0: 59; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw] 60; CHECK-NEXT: ret 61 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 62 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 63 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x half*> 64 call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x half*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 65 ret void 66} 67 68define void @masked_scatter_nxv2bf16_sext_offsets(<vscale x 2 x bfloat> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind #0 { 69; CHECK-LABEL: masked_scatter_nxv2bf16_sext_offsets: 70; CHECK: // %bb.0: 71; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw] 72; CHECK-NEXT: ret 73 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 74 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 75 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x bfloat*> 76 call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 77 ret void 78} 79 80define void @masked_scatter_nxv2f32_sext_offsets(<vscale x 2 x float> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 81; CHECK-LABEL: masked_scatter_nxv2f32_sext_offsets: 82; CHECK: // %bb.0: 83; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, sxtw] 84; CHECK-NEXT: ret 85 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 86 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 87 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x float*> 88 call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x float*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 89 ret void 90} 91 92define void @masked_scatter_nxv2f64_sext_offsets(<vscale x 2 x double> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 93; CHECK-LABEL: masked_scatter_nxv2f64_sext_offsets: 94; CHECK: // %bb.0: 95; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, sxtw] 96; CHECK-NEXT: ret 97 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 98 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 99 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x double*> 100 call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x double*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 101 ret void 102} 103 104define void @masked_scatter_nxv2i8_zext_offsets(<vscale x 2 x i8> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 105; CHECK-LABEL: masked_scatter_nxv2i8_zext_offsets: 106; CHECK: // %bb.0: 107; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d, uxtw] 108; CHECK-NEXT: ret 109 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 110 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 111 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x i8*> 112 call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x i8*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 113 ret void 114} 115 116define void @masked_scatter_nxv2i16_zext_offsets(<vscale x 2 x i16> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 117; CHECK-LABEL: masked_scatter_nxv2i16_zext_offsets: 118; CHECK: // %bb.0: 119; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw] 120; CHECK-NEXT: ret 121 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 122 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 123 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x i16*> 124 call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x i16*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 125 ret void 126} 127 128define void @masked_scatter_nxv2i32_zext_offsets(<vscale x 2 x i32> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 129; CHECK-LABEL: masked_scatter_nxv2i32_zext_offsets: 130; CHECK: // %bb.0: 131; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, uxtw] 132; CHECK-NEXT: ret 133 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 134 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 135 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x i32*> 136 call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x i32*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 137 ret void 138} 139 140define void @masked_scatter_nxv2i64_zext_offsets(<vscale x 2 x i64> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 141; CHECK-LABEL: masked_scatter_nxv2i64_zext_offsets: 142; CHECK: // %bb.0: 143; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, uxtw] 144; CHECK-NEXT: ret 145 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 146 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 147 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x i64*> 148 call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x i64*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 149 ret void 150} 151 152define void @masked_scatter_nxv2f16_zext_offsets(<vscale x 2 x half> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 153; CHECK-LABEL: masked_scatter_nxv2f16_zext_offsets: 154; CHECK: // %bb.0: 155; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw] 156; CHECK-NEXT: ret 157 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 158 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 159 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x half*> 160 call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x half*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 161 ret void 162} 163 164define void @masked_scatter_nxv2bf16_zext_offsets(<vscale x 2 x bfloat> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind #0 { 165; CHECK-LABEL: masked_scatter_nxv2bf16_zext_offsets: 166; CHECK: // %bb.0: 167; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw] 168; CHECK-NEXT: ret 169 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 170 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 171 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x bfloat*> 172 call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x bfloat*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 173 ret void 174} 175 176define void @masked_scatter_nxv2f32_zext_offsets(<vscale x 2 x float> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 177; CHECK-LABEL: masked_scatter_nxv2f32_zext_offsets: 178; CHECK: // %bb.0: 179; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, uxtw] 180; CHECK-NEXT: ret 181 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 182 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 183 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x float*> 184 call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x float*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 185 ret void 186} 187 188define void @masked_scatter_nxv2f64_zext_offsets(<vscale x 2 x double> %data, i8* %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind { 189; CHECK-LABEL: masked_scatter_nxv2f64_zext_offsets: 190; CHECK: // %bb.0: 191; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, uxtw] 192; CHECK-NEXT: ret 193 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64> 194 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 2 x i64> %offsets 195 %ptrs = bitcast <vscale x 2 x i8*> %byte_ptrs to <vscale x 2 x double*> 196 call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x double*> %ptrs, i32 0, <vscale x 2 x i1> %masks) 197 ret void 198} 199 200;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 201; unscaled packed 32-bit offsets 202;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 203define void @masked_scatter_nxv4i8_sext_offsets(<vscale x 4 x i8> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind { 204; CHECK-LABEL: masked_scatter_nxv4i8_sext_offsets: 205; CHECK: // %bb.0: 206; CHECK-NEXT: st1b { z0.s }, p0, [x0, z1.s, sxtw] 207; CHECK-NEXT: ret 208 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 209 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 210 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x i8*> 211 call void @llvm.masked.scatter.nxv4i8(<vscale x 4 x i8> %data, <vscale x 4 x i8*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 212 ret void 213} 214 215define void @masked_scatter_nxv4i16_sext_offsets(<vscale x 4 x i16> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind { 216; CHECK-LABEL: masked_scatter_nxv4i16_sext_offsets: 217; CHECK: // %bb.0: 218; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw] 219; CHECK-NEXT: ret 220 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 221 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 222 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x i16*> 223 call void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x i16*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 224 ret void 225} 226 227define void @masked_scatter_nxv4i32_sext_offsets(<vscale x 4 x i32> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind { 228; CHECK-LABEL: masked_scatter_nxv4i32_sext_offsets: 229; CHECK: // %bb.0: 230; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, sxtw] 231; CHECK-NEXT: ret 232 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 233 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 234 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x i32*> 235 call void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i32*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 236 ret void 237} 238 239define void @masked_scatter_nxv4f16_sext_offsets(<vscale x 4 x half> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind { 240; CHECK-LABEL: masked_scatter_nxv4f16_sext_offsets: 241; CHECK: // %bb.0: 242; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw] 243; CHECK-NEXT: ret 244 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 245 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 246 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x half*> 247 call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x half*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 248 ret void 249} 250 251define void @masked_scatter_nxv4bf16_sext_offsets(<vscale x 4 x bfloat> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 { 252; CHECK-LABEL: masked_scatter_nxv4bf16_sext_offsets: 253; CHECK: // %bb.0: 254; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw] 255; CHECK-NEXT: ret 256 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 257 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 258 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x bfloat*> 259 call void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x bfloat*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 260 ret void 261} 262 263define void @masked_scatter_nxv4f32_sext_offsets(<vscale x 4 x float> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 { 264; CHECK-LABEL: masked_scatter_nxv4f32_sext_offsets: 265; CHECK: // %bb.0: 266; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, sxtw] 267; CHECK-NEXT: ret 268 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 269 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 270 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x float*> 271 call void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x float*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 272 ret void 273} 274 275define void @masked_scatter_nxv4i8_zext_offsets(<vscale x 4 x i8> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind { 276; CHECK-LABEL: masked_scatter_nxv4i8_zext_offsets: 277; CHECK: // %bb.0: 278; CHECK-NEXT: st1b { z0.s }, p0, [x0, z1.s, uxtw] 279; CHECK-NEXT: ret 280 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 281 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 282 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x i8*> 283 call void @llvm.masked.scatter.nxv4i8(<vscale x 4 x i8> %data, <vscale x 4 x i8*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 284 ret void 285} 286 287define void @masked_scatter_nxv4i16_zext_offsets(<vscale x 4 x i16> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind { 288; CHECK-LABEL: masked_scatter_nxv4i16_zext_offsets: 289; CHECK: // %bb.0: 290; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw] 291; CHECK-NEXT: ret 292 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 293 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 294 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x i16*> 295 call void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x i16*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 296 ret void 297} 298 299define void @masked_scatter_nxv4i32_zext_offsets(<vscale x 4 x i32> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind { 300; CHECK-LABEL: masked_scatter_nxv4i32_zext_offsets: 301; CHECK: // %bb.0: 302; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, uxtw] 303; CHECK-NEXT: ret 304 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 305 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 306 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x i32*> 307 call void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x i32*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 308 ret void 309} 310 311define void @masked_scatter_nxv4f16_zext_offsets(<vscale x 4 x half> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind { 312; CHECK-LABEL: masked_scatter_nxv4f16_zext_offsets: 313; CHECK: // %bb.0: 314; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw] 315; CHECK-NEXT: ret 316 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 317 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 318 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x half*> 319 call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x half*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 320 ret void 321} 322 323define void @masked_scatter_nxv4bf16_zext_offsets(<vscale x 4 x bfloat> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 { 324; CHECK-LABEL: masked_scatter_nxv4bf16_zext_offsets: 325; CHECK: // %bb.0: 326; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw] 327; CHECK-NEXT: ret 328 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 329 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 330 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x bfloat*> 331 call void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x bfloat*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 332 ret void 333} 334 335define void @masked_scatter_nxv4f32_zext_offsets(<vscale x 4 x float> %data, i8* %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 { 336; CHECK-LABEL: masked_scatter_nxv4f32_zext_offsets: 337; CHECK: // %bb.0: 338; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, uxtw] 339; CHECK-NEXT: ret 340 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64> 341 %byte_ptrs = getelementptr i8, i8* %base, <vscale x 4 x i64> %offsets 342 %ptrs = bitcast <vscale x 4 x i8*> %byte_ptrs to <vscale x 4 x float*> 343 call void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x float*> %ptrs, i32 0, <vscale x 4 x i1> %masks) 344 ret void 345} 346 347declare void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half*>, i32, <vscale x 2 x i1>) 348declare void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half*>, i32, <vscale x 4 x i1>) 349declare void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat>, <vscale x 4 x bfloat*>, i32, <vscale x 4 x i1>) 350declare void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float*>, i32, <vscale x 4 x i1>) 351declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x bfloat*>, i32, <vscale x 2 x i1>) 352declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float*>, i32, <vscale x 2 x i1>) 353declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double*>, i32, <vscale x 2 x i1>) 354declare void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i16*>, i32, <vscale x 2 x i1>) 355declare void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32*>, i32, <vscale x 2 x i1>) 356declare void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64*>, i32, <vscale x 2 x i1>) 357declare void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i8*>, i32, <vscale x 2 x i1>) 358declare void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x i16*>, i32, <vscale x 4 x i1>) 359declare void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32*>, i32, <vscale x 4 x i1>) 360declare void @llvm.masked.scatter.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x i8*>, i32, <vscale x 4 x i1>) 361attributes #0 = { "target-features"="+sve,+bf16" } 362