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Searched refs:s_not_b32 (Results 1 – 25 of 39) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dfshl.ll21 ; SI-NEXT: s_not_b32 s0, s0
36 ; VI-NEXT: s_not_b32 s0, s0
54 ; GFX9-NEXT: s_not_b32 s0, s0
145 ; SI-NEXT: s_not_b32 s1, s1
151 ; SI-NEXT: s_not_b32 s0, s0
167 ; VI-NEXT: s_not_b32 s1, s1
173 ; VI-NEXT: s_not_b32 s0, s0
192 ; GFX9-NEXT: s_not_b32 s1, s1
198 ; GFX9-NEXT: s_not_b32 s0, s0
304 ; SI-NEXT: s_not_b32 s3, s3
[all …]
Dsub_i1.ll17 ; WAVE32: s_not_b32
28 ; WAVE32: s_not_b32
Dadd_i1.ll18 ; GFX10: s_not_b32
29 ; GFX10: s_not_b32
Dxnor.ll21 ; GCN: s_not_b32
91 ; GCN: s_not_b32
103 ; GCN: s_not_b32
Dandorn2.ll64 ; GCN: s_not_b32
90 ; GCN: s_not_b32
Dnor.ll20 ; GCN: s_not_b32
Dnand.ll20 ; GCN: s_not_b32
Datomic_optimizations_local_pointer.ll535 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
537 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
774 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
776 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
1013 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
1015 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
2079 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
2081 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
2814 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
2816 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
[all …]
Dxor.ll93 ; SI: s_not_b32
Datomic_optimizations_pixelshader.ll387 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
389 ; GFX1032-NEXT: s_not_b32 exec_lo, exec_lo
Dwave32.ll623 ; GFX1032: s_not_b32 exec_lo, exec_lo
625 ; GFX1032: s_not_b32 exec_lo, exec_lo
636 ; GFX1032: s_not_b32 exec_lo, exec_lo
639 ; GFX1032: s_not_b32 exec_lo, exec_lo
/external/llvm-project/llvm/test/MC/AMDGPU/
Dexpressions.s300 s_not_b32 s0, -s label
304 s_not_b32 s0, -ttmp label
Dsop1.s91 s_not_b32 s1, s2 label
Dgfx7_asm_all.s10770 s_not_b32 s5, s1 label
10773 s_not_b32 s103, s1 label
10776 s_not_b32 flat_scratch_lo, s1 label
10779 s_not_b32 flat_scratch_hi, s1 label
10782 s_not_b32 vcc_lo, s1 label
10785 s_not_b32 vcc_hi, s1 label
10788 s_not_b32 tba_lo, s1 label
10791 s_not_b32 tba_hi, s1 label
10794 s_not_b32 tma_lo, s1 label
10797 s_not_b32 tma_hi, s1 label
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Duaddsat.ll55 ; GFX6-NEXT: s_not_b32 s2, s0
145 ; GFX6-NEXT: s_not_b32 s2, s0
274 ; GFX6-NEXT: s_not_b32 s4, s0
281 ; GFX6-NEXT: s_not_b32 s3, s1
523 ; GFX6-NEXT: s_not_b32 s8, s0
530 ; GFX6-NEXT: s_not_b32 s5, s1
537 ; GFX6-NEXT: s_not_b32 s5, s2
544 ; GFX6-NEXT: s_not_b32 s5, s3
738 ; GFX6-NEXT: s_not_b32 s2, s0
811 ; GFX6-NEXT: s_not_b32 s2, s0
[all …]
Dinsertelement.i16.ll76 ; GFX9-NEXT: s_not_b32 s0, s0
93 ; GFX8-NEXT: s_not_b32 s0, s0
111 ; GFX7-NEXT: s_not_b32 s0, s0
367 ; GFX9-NEXT: s_not_b32 s0, s0
383 ; GFX8-NEXT: s_not_b32 s0, s0
401 ; GFX7-NEXT: s_not_b32 s0, s0
542 ; GFX9-NEXT: s_not_b32 s0, s0
565 ; GFX8-NEXT: s_not_b32 s0, s0
589 ; GFX7-NEXT: s_not_b32 s0, s0
956 ; GFX9-NEXT: s_not_b32 s0, s0
[all …]
Dorn2.ll28 ; GCN-NEXT: s_not_b32 s1, s3
79 ; GCN-NEXT: s_not_b32 s0, s2
Dandn2.ll28 ; GCN-NEXT: s_not_b32 s1, s3
79 ; GCN-NEXT: s_not_b32 s0, s2
Dxnor.ll68 ; GCN-NEXT: s_not_b32 s2, s1
Dinsertelement.i8.ll590 ; GFX9-NEXT: s_not_b32 s3, s3
624 ; GFX8-NEXT: s_not_b32 s0, s0
663 ; GFX7-NEXT: s_not_b32 s1, s1
1204 ; GFX9-NEXT: s_not_b32 s2, s2
1238 ; GFX8-NEXT: s_not_b32 s0, s0
1276 ; GFX7-NEXT: s_not_b32 s1, s1
1676 ; GFX9-NEXT: s_not_b32 s3, s3
1731 ; GFX8-NEXT: s_not_b32 s0, s0
1791 ; GFX7-NEXT: s_not_b32 s1, s1
2710 ; GFX9-NEXT: s_not_b32 s2, s2
[all …]
/external/llvm/test/MC/AMDGPU/
Dsop1.s67 s_not_b32 s1, s2 label
/external/llvm/test/CodeGen/AMDGPU/
Dxor.ll93 ; SI: s_not_b32
/external/llvm/test/MC/Disassembler/AMDGPU/
Dsop1_vi.txt42 # VI: s_not_b32 s1, s2 ; encoding: [0x02,0x04,0x81,0xbe]
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dsop1_vi.txt51 # VI: s_not_b32 s1, s2 ; encoding: [0x02,0x04,0x81,0xbe]
/external/mesa3d/src/amd/compiler/
Daco_optimizer.cpp1407 case aco_opcode::s_not_b32: in label_instruction()
2185 …if (!op2_instr || (op2_instr->opcode != aco_opcode::s_not_b32 && op2_instr->opcode != aco_opcode::… in combine_salu_n2()
2887 } else if (instr->opcode == aco_opcode::s_not_b32 || instr->opcode == aco_opcode::s_not_b64) { in combine_instruction()

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