1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s | FileCheck %s 3 4target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" 5target triple = "wasm32-unknown-unknown" 6 7; Regression test for pr47375, in which an assertion was triggering 8; because WebAssemblyTargetLowering::isVectorLoadExtDesirable was 9; improperly assuming the use of simple value types. 10 11define void @sext_vec() { 12; CHECK-LABEL: sext_vec: 13; CHECK: .functype sext_vec () -> () 14; CHECK-NEXT: .local i32 15; CHECK-NEXT: # %bb.0: 16; CHECK-NEXT: local.get 0 17; CHECK-NEXT: i32.load8_u 0 18; CHECK-NEXT: local.set 0 19; CHECK-NEXT: local.get 0 20; CHECK-NEXT: i32.const 0 21; CHECK-NEXT: i32.store8 0 22; CHECK-NEXT: local.get 0 23; CHECK-NEXT: local.get 0 24; CHECK-NEXT: local.get 0 25; CHECK-NEXT: i32.const 7 26; CHECK-NEXT: i32.shl 27; CHECK-NEXT: i32.or 28; CHECK-NEXT: i32.const 7175 29; CHECK-NEXT: i32.and 30; CHECK-NEXT: i32.store16 0 31; CHECK-NEXT: # fallthrough-return 32 %L1 = load <2 x i3>, <2 x i3>* undef, align 2 33 %zext = zext <2 x i3> %L1 to <2 x i10> 34 store <2 x i10> %zext, <2 x i10>* undef, align 4 35 ret void 36} 37