| /external/XNNPACK/src/qs8-requantization/ |
| D | rndnu-scalar.c | 37 const int32_t smin = (int32_t) qmin - (int32_t) zero_point; in xnn_qs8_requantize_rndnu__scalar() local
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| D | rndna-scalar-signed64.c | 37 const int32_t smin = (int32_t) qmin - (int32_t) zero_point; in xnn_qs8_requantize_rndna__scalar_signed64() local
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| D | rndna-scalar-unsigned64.c | 37 const int32_t smin = (int32_t) qmin - (int32_t) zero_point; in xnn_qs8_requantize_rndna__scalar_unsigned64() local
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| D | gemmlowp-scalar.c | 46 const int32_t smin = (int32_t) qmin - (int32_t) zero_point; in xnn_qs8_requantize_gemmlowp__scalar() local
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| D | rndna-scalar-unsigned32.c | 40 const int32_t smin = (int32_t) qmin - (int32_t) zero_point; in xnn_qs8_requantize_rndna__scalar_unsigned32() local
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| /external/XNNPACK/src/qu8-requantization/ |
| D | rndna-scalar-signed64.c | 37 const int32_t smin = (int32_t) (uint32_t) qmin - (int32_t) (uint32_t) zero_point; in xnn_qu8_requantize_rndna__scalar_signed64() local
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| D | rndna-scalar-unsigned64.c | 37 const int32_t smin = (int32_t) (uint32_t) qmin - (int32_t) (uint32_t) zero_point; in xnn_qu8_requantize_rndna__scalar_unsigned64() local
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| D | gemmlowp-scalar.c | 46 const int32_t smin = (int32_t) (uint32_t) qmin - (int32_t) (uint32_t) zero_point; in xnn_qu8_requantize_gemmlowp__scalar() local
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| D | rndna-scalar-unsigned32.c | 40 const int32_t smin = (int32_t) (uint32_t) qmin - (int32_t) (uint32_t) zero_point; in xnn_qu8_requantize_rndna__scalar_unsigned32() local
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| /external/ltp/testcases/realtime/func/matrix_mult/ |
| D | matrix_mult.c | 176 long smin = 0, smax = 0, cmin = 0, cmax = 0, delta = 0; in main_thread() local
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| /external/llvm/lib/IR/ |
| D | ConstantRange.cpp | 770 ConstantRange::smin(const ConstantRange &Other) const { in smin() function in ConstantRange
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| /external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/bigdec/ |
| D | DiagBigDecimalTest.java | 138 private static final short smin = -32768; field in DiagBigDecimalTest
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| /external/icu/android_icu4j/src/main/tests/android/icu/dev/test/bigdec/ |
| D | DiagBigDecimalTest.java | 141 private static final short smin = -32768; field in DiagBigDecimalTest
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
| D | APInt.h | 2162 inline const APInt &smin(const APInt &A, const APInt &B) { in smin() function
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| /external/llvm/include/llvm/ADT/ |
| D | APInt.h | 1756 inline const APInt &smin(const APInt &A, const APInt &B) { in smin() function
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| /external/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
| D | APInt.h | 1783 inline const APInt &smin(const APInt &A, const APInt &B) { in smin() function
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
| D | ConstantRange.cpp | 1010 ConstantRange::smin(const ConstantRange &Other) const { in smin() function in ConstantRange
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| /external/mksh/src/ |
| D | misc.c | 819 const unsigned char *smin) in do_gmatch()
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| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 1462 __ smin(v24.V16B(), v8.V16B(), v18.V16B()); in GenerateTestSequenceNEON() local
1463 __ smin(v29.V2S(), v8.V2S(), v23.V2S()); in GenerateTestSequenceNEON() local
1464 __ smin(v6.V4H(), v11.V4H(), v21.V4H()); in GenerateTestSequenceNEON() local
1465 __ smin(v24.V4S(), v23.V4S(), v15.V4S()); in GenerateTestSequenceNEON() local
1466 __ smin(v8.V8B(), v16.V8B(), v4.V8B()); in GenerateTestSequenceNEON() local
1467 __ smin(v12.V8H(), v1.V8H(), v10.V8H()); in GenerateTestSequenceNEON() local
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| D | test-api-movprfx-aarch64.cc | 259 __ smin(z26.VnS(), p0.Merging(), z26.VnS(), z26.VnS()); in TEST() local
822 __ smin(z3.VnS(), p1.Merging(), z3.VnS(), z20.VnS()); in TEST() local
1170 __ smin(z15.VnD(), z15.VnD(), 42); in TEST() local
1555 __ smin(z10.VnD(), p4.Merging(), z10.VnD(), z29.VnD()); in TEST() local
1558 __ smin(z13.VnD(), z13.VnD(), 42); in TEST() local
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| /external/vixl/src/aarch64/ |
| D | assembler-sve-aarch64.cc | 2496 void Assembler::smin(const ZRegister& zd, in smin() function in vixl::aarch64::Assembler
3682 void Assembler::smin(const ZRegister& zd, const ZRegister& zn, int imm8) { in smin() function in vixl::aarch64::Assembler
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| D | logic-aarch64.cc | 1167 LogicVRegister Simulator::smin(VectorFormat vform, in smin() function in vixl::aarch64::Simulator
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| /external/swiftshader/src/Reactor/ |
| D | SubzeroReactor.cpp | 2505 auto smin = std::numeric_limits<short>::min(); in Short4() local
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