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1 // Auto-generated file. Do not edit!
2 //   Template: src/qu8-gemm/c4-neondot.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/gemm.h>
15 #include <xnnpack/math.h>
16 
17 
xnn_qu8_gemm_minmax_rndnu_ukernel_3x8c4__neondot(size_t mr,size_t nc,size_t kc,const uint8_t * restrict a,size_t a_stride,const void * restrict w,uint8_t * restrict c,size_t cm_stride,size_t cn_stride,const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_qu8_gemm_minmax_rndnu_ukernel_3x8c4__neondot(
19     size_t mr,
20     size_t nc,
21     size_t kc,
22     const uint8_t* restrict a,
23     size_t a_stride,
24     const void* restrict w,
25     uint8_t* restrict c,
26     size_t cm_stride,
27     size_t cn_stride,
28     const union xnn_qu8_conv_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
29 {
30   assert(mr != 0);
31   assert(mr <= 3);
32   assert(nc != 0);
33   assert(kc != 0);
34   assert(kc % sizeof(uint8_t) == 0);
35   assert(a != NULL);
36   assert(w != NULL);
37   assert(c != NULL);
38 
39   kc = round_up_po2(kc, 4 * sizeof(uint8_t));
40   const uint8_t* a0 = a;
41   uint8_t* c0 = c;
42   const uint8_t* a1 = (const uint8_t*) ((uintptr_t) a0 + a_stride);
43   uint8_t* c1 = (uint8_t*) ((uintptr_t) c0 + cm_stride);
44   if XNN_UNPREDICTABLE(mr < 2) {
45     a1 = a0;
46     c1 = c0;
47   }
48   const uint8_t* a2 = (const uint8_t*) ((uintptr_t) a1 + a_stride);
49   uint8_t* c2 = (uint8_t*) ((uintptr_t) c1 + cm_stride);
50   if XNN_UNPREDICTABLE(mr <= 2) {
51     a2 = a1;
52     c2 = c1;
53   }
54 
55   const uint8x8_t va_zero_point = vld1_dup_u8(&params->rndnu_neon.kernel_zero_point[0]);
56 
57   // Loop over groups of 8 columns.
58   do {
59     // Initialize accumulators with bias. 8 bias values are loaded from the
60     // weight matrix, at the start of the group of 8 columns.
61     uint32x4_t vpacc0x0123 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
62     uint32x4_t vpacc0x4567 = vld1q_u32(w); w = (const void*) ((const uint32_t*) w + 4);
63     uint32x4_t vpacc1x0123 = vpacc0x0123;
64     uint32x4_t vpacc1x4567 = vpacc0x4567;
65     uint32x4_t vpacc2x0123 = vpacc0x0123;
66     uint32x4_t vpacc2x4567 = vpacc0x4567;
67     uint32x2_t vnacc0 = vmov_n_u32(0);
68     uint32x2_t vnacc1 = vmov_n_u32(0);
69     uint32x2_t vnacc2 = vmov_n_u32(0);
70 
71     // Inner accumulation loop along the 8 columns.
72     size_t k = kc;
73     // 2x partial unrolled loop to load 8 bytes at a time.
74     while (k >= 8 * sizeof(uint8_t)) {
75       // Load a 3x8 block of activations.
76       const uint8x8_t va0x01234567 = vld1_u8(a0); a0 += 8;
77       const uint8x8_t va1x01234567 = vld1_u8(a1); a1 += 8;
78       const uint8x8_t va2x01234567 = vld1_u8(a2); a2 += 8;
79 
80       // Load a 8x8 block of weights.
81       const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
82       const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
83       const uint8x16_t vb4567x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
84       const uint8x16_t vb4567x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
85 
86       // Multiply-accumulate: 3x8 * 8x8 --> 3x8.
87       vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
88       vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
89       vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
90       vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb4567x0123, va0x01234567, 1);
91       vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb4567x4567, va0x01234567, 1);
92       vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
93       vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
94       vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
95       vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb4567x0123, va1x01234567, 1);
96       vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb4567x4567, va1x01234567, 1);
97       vnacc2 = vdot_u32(vnacc2, va_zero_point, va2x01234567);
98       vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb0123x0123, va2x01234567, 0);
99       vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb0123x4567, va2x01234567, 0);
100       vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb4567x0123, va2x01234567, 1);
101       vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb4567x4567, va2x01234567, 1);
102 
103       k -= 8 * sizeof(uint8_t);
104     }
105     // Handle up to 4 final positions of `k`
106     if XNN_UNLIKELY(k != 0) {
107       // Load a 3x4 block of activations.
108       const uint8x8_t va0x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a0, vmov_n_u32(0), 0)); a0 += 4;
109       const uint8x8_t va1x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a1, vmov_n_u32(0), 0)); a1 += 4;
110       const uint8x8_t va2x01234567 = vreinterpret_u8_u32(vld1_lane_u32((const void*) a2, vmov_n_u32(0), 0)); a2 += 4;
111 
112       // Load a 4x8 block of weights.
113       const uint8x16_t vb0123x0123 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
114       const uint8x16_t vb0123x4567 = vld1q_u8(w); w = (const void*) ((const uint8_t*) w + 16);
115 
116       // Multiply-accumulate: 3x4 * 4x8 --> 3x8.
117       vnacc0 = vdot_u32(vnacc0, va_zero_point, va0x01234567);
118       vpacc0x0123 = vdotq_lane_u32(vpacc0x0123, vb0123x0123, va0x01234567, 0);
119       vpacc0x4567 = vdotq_lane_u32(vpacc0x4567, vb0123x4567, va0x01234567, 0);
120       vnacc1 = vdot_u32(vnacc1, va_zero_point, va1x01234567);
121       vpacc1x0123 = vdotq_lane_u32(vpacc1x0123, vb0123x0123, va1x01234567, 0);
122       vpacc1x4567 = vdotq_lane_u32(vpacc1x4567, vb0123x4567, va1x01234567, 0);
123       vnacc2 = vdot_u32(vnacc2, va_zero_point, va2x01234567);
124       vpacc2x0123 = vdotq_lane_u32(vpacc2x0123, vb0123x0123, va2x01234567, 0);
125       vpacc2x4567 = vdotq_lane_u32(vpacc2x4567, vb0123x4567, va2x01234567, 0);
126     }
127 
128     // Subtract zero point from accumulators.
129     vnacc0 = vpadd_u32(vnacc0, vnacc0);
130     const uint32x4_t vnacc0x0123 = vcombine_u32(vnacc0, vnacc0);
131     int32x4_t vacc0x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x0123, vnacc0x0123));
132     int32x4_t vacc0x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc0x4567, vnacc0x0123));
133     vnacc1 = vpadd_u32(vnacc1, vnacc1);
134     const uint32x4_t vnacc1x0123 = vcombine_u32(vnacc1, vnacc1);
135     int32x4_t vacc1x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x0123, vnacc1x0123));
136     int32x4_t vacc1x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc1x4567, vnacc1x0123));
137     vnacc2 = vpadd_u32(vnacc2, vnacc2);
138     const uint32x4_t vnacc2x0123 = vcombine_u32(vnacc2, vnacc2);
139     int32x4_t vacc2x0123 = vreinterpretq_s32_u32(vsubq_u32(vpacc2x0123, vnacc2x0123));
140     int32x4_t vacc2x4567 = vreinterpretq_s32_u32(vsubq_u32(vpacc2x4567, vnacc2x0123));
141 
142     const int32x4_t vright_pre_shift = vld1q_dup_s32(&params->rndnu_neon.right_pre_shift);
143     const int32x4_t vmultiplier = vld1q_dup_s32(&params->rndnu_neon.multiplier);
144     const int32x4_t vright_post_shift = vld1q_dup_s32(&params->rndnu_neon.right_post_shift);
145 
146     vacc0x0123 = vshlq_s32(vacc0x0123, vright_pre_shift);
147     vacc0x4567 = vshlq_s32(vacc0x4567, vright_pre_shift);
148     vacc1x0123 = vshlq_s32(vacc1x0123, vright_pre_shift);
149     vacc1x4567 = vshlq_s32(vacc1x4567, vright_pre_shift);
150     vacc2x0123 = vshlq_s32(vacc2x0123, vright_pre_shift);
151     vacc2x4567 = vshlq_s32(vacc2x4567, vright_pre_shift);
152 
153     vacc0x0123 = vqdmulhq_s32(vacc0x0123, vmultiplier);
154     vacc0x4567 = vqdmulhq_s32(vacc0x4567, vmultiplier);
155     vacc1x0123 = vqdmulhq_s32(vacc1x0123, vmultiplier);
156     vacc1x4567 = vqdmulhq_s32(vacc1x4567, vmultiplier);
157     vacc2x0123 = vqdmulhq_s32(vacc2x0123, vmultiplier);
158     vacc2x4567 = vqdmulhq_s32(vacc2x4567, vmultiplier);
159 
160     vacc0x0123 = vrshlq_s32(vacc0x0123, vright_post_shift);
161     vacc0x4567 = vrshlq_s32(vacc0x4567, vright_post_shift);
162     vacc1x0123 = vrshlq_s32(vacc1x0123, vright_post_shift);
163     vacc1x4567 = vrshlq_s32(vacc1x4567, vright_post_shift);
164     vacc2x0123 = vrshlq_s32(vacc2x0123, vright_post_shift);
165     vacc2x4567 = vrshlq_s32(vacc2x4567, vright_post_shift);
166 
167     const int16x8_t voutput_zero_point = vld1q_dup_s16(&params->rndnu_neon.output_zero_point);
168 #if XNN_ARCH_ARM64
169     const int16x8_t vacc0x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc0x0123), vacc0x4567), voutput_zero_point);
170     const int16x8_t vacc1x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc1x0123), vacc1x4567), voutput_zero_point);
171     const int16x8_t vacc2x01234567 = vqaddq_s16(vqmovn_high_s32(vqmovn_s32(vacc2x0123), vacc2x4567), voutput_zero_point);
172 
173     uint8x16_t vout0x01234567_1x01234567 = vqmovun_high_s16(vqmovun_s16(vacc0x01234567), vacc1x01234567);
174     uint8x8_t vout2x01234567 = vqmovun_s16(vacc2x01234567);
175 #else
176     const int16x8_t vacc0x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc0x0123), vqmovn_s32(vacc0x4567)), voutput_zero_point);
177     const int16x8_t vacc1x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc1x0123), vqmovn_s32(vacc1x4567)), voutput_zero_point);
178     const int16x8_t vacc2x01234567 = vqaddq_s16(vcombine_s16(vqmovn_s32(vacc2x0123), vqmovn_s32(vacc2x4567)), voutput_zero_point);
179 
180     uint8x16_t vout0x01234567_1x01234567 = vcombine_u8(vqmovun_s16(vacc0x01234567), vqmovun_s16(vacc1x01234567));
181     uint8x8_t vout2x01234567 = vqmovun_s16(vacc2x01234567);
182 #endif
183     const uint8x16_t voutput_min = vld1q_dup_u8(&params->rndnu_neon.output_min);
184     const uint8x16_t voutput_max = vld1q_dup_u8(&params->rndnu_neon.output_max);
185 
186     vout0x01234567_1x01234567 = vmaxq_u8(vout0x01234567_1x01234567, voutput_min);
187     vout2x01234567 = vmax_u8(vout2x01234567, vget_low_u8(voutput_min));
188 
189     vout0x01234567_1x01234567 = vminq_u8(vout0x01234567_1x01234567, voutput_max);
190     vout2x01234567 = vmin_u8(vout2x01234567, vget_low_u8(voutput_max));
191 
192     if (nc >= 8) {
193       vst1_u8(c0 + 0, vget_low_u8(vout0x01234567_1x01234567));
194       vst1_u8(c1 + 0, vget_high_u8(vout0x01234567_1x01234567));
195       vst1_u8(c2 + 0, vout2x01234567);
196 
197       c0 = (uint8_t*) ((uintptr_t) c0 + cn_stride);
198       c1 = (uint8_t*) ((uintptr_t) c1 + cn_stride);
199       c2 = (uint8_t*) ((uintptr_t) c2 + cn_stride);
200 
201       a0 = (const uint8_t*) ((uintptr_t) a0 - kc);
202       a1 = (const uint8_t*) ((uintptr_t) a1 - kc);
203       a2 = (const uint8_t*) ((uintptr_t) a2 - kc);
204 
205       nc -= 8;
206     } else {
207       if (nc & 4) {
208         vst1q_lane_u32((void*) c0, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 0); c0 += 4;
209         vst1q_lane_u32((void*) c1, vreinterpretq_u32_u8(vout0x01234567_1x01234567), 2); c1 += 4;
210         vst1_lane_u32((void*) c2, vreinterpret_u32_u8(vout2x01234567), 0); c2 += 4;
211         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 4);
212         vout2x01234567 = vext_u8(vout2x01234567, vout2x01234567, 4);
213       }
214       if (nc & 2) {
215         vst1q_lane_u16((void*) c0, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 0); c0 += 2;
216         vst1q_lane_u16((void*) c1, vreinterpretq_u16_u8(vout0x01234567_1x01234567), 4); c1 += 2;
217         vst1_lane_u16((void*) c2, vreinterpret_u16_u8(vout2x01234567), 0); c2 += 2;
218         vout0x01234567_1x01234567 = vextq_u8(vout0x01234567_1x01234567, vout0x01234567_1x01234567, 2);
219         vout2x01234567 = vext_u8(vout2x01234567, vout2x01234567, 2);
220       }
221       if (nc & 1) {
222         vst1q_lane_u8(c0, vout0x01234567_1x01234567, 0);
223         vst1q_lane_u8(c1, vout0x01234567_1x01234567, 8);
224         vst1_lane_u8(c2, vout2x01234567, 0);
225       }
226 
227       nc = 0;
228     }
229   } while (nc != 0);
230 }
231