| /external/mesa3d/src/intel/compiler/ |
| D | brw_compile_vs.cpp | 98 const unsigned dispatch_width = compiler->devinfo->ver >= 20 ? 16 : 8; in brw_compile_vs() local
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| D | brw_compile_tcs.cpp | 134 const unsigned dispatch_width = devinfo->ver >= 20 ? 16 : 8; in brw_compile_tcs() local
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| D | brw_fs.h | 388 const unsigned dispatch_width; /**< 8, 16 or 32 */ variable
485 unsigned dispatch_width; /**< 8, 16 or 32 */ variable
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| D | brw_fs_visitor.cpp | 986 unsigned dispatch_width, in fs_visitor()
1006 unsigned dispatch_width, unsigned max_polygons, in fs_visitor()
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| D | brw_mesh.cpp | 312 const unsigned dispatch_width = 8 << simd; in brw_compile_task() local
1164 unsigned dispatch_width) in brw_nir_initialize_mue()
1527 const unsigned dispatch_width = 8 << simd; in brw_compile_mesh() local
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| D | brw_fs_builder.h | 58 unsigned dispatch_width) : in fs_builder()
182 dispatch_width() const in dispatch_width() function
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| D | brw_shader.cpp | 1255 const unsigned dispatch_width = devinfo->ver >= 20 ? 16 : 8; in brw_compile_tes() local
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| D | brw_fs.cpp | 3839 brw_nir_lower_simd(nir_shader *nir, unsigned dispatch_width) in brw_nir_lower_simd()
3880 const unsigned dispatch_width = 8u << simd; in brw_compile_cs() local
4034 const unsigned dispatch_width = 8u << simd; in compile_single_bs() local
4074 const unsigned dispatch_width = selected->dispatch_width; in compile_single_bs() local
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| D | brw_fs_generator.cpp | 877 fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, in generate_code()
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| D | brw_ir_performance.cpp | 1020 unsigned dispatch_width) in calculate_performance()
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| D | brw_compiler.h | 1029 unsigned dispatch_width) in brw_cs_prog_data_prog_offset()
1307 uint32_t dispatch_width; /**< 0 for vec4 */ member
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| /external/mesa3d/src/intel/compiler/elk/ |
| D | elk_fs.h | 408 const unsigned dispatch_width; /**< 8, 16 or 32 */ variable
532 unsigned dispatch_width; /**< 8, 16 or 32 */ variable
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| D | elk_fs_builder.h | 58 unsigned dispatch_width) : in fs_builder()
182 dispatch_width() const in dispatch_width() function
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| D | elk_vec4_tcs.cpp | 451 const unsigned dispatch_width = devinfo->ver >= 20 ? 16 : 8; in elk_compile_tcs() local
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| D | elk_fs_visitor.cpp | 1168 unsigned dispatch_width, in elk_fs_visitor()
1188 unsigned dispatch_width, unsigned max_polygons, in elk_fs_visitor()
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| D | elk_fs_reg_allocate.cpp | 85 aligned_bary_size(unsigned dispatch_width) in aligned_bary_size()
91 elk_alloc_reg_set(struct elk_compiler *compiler, int dispatch_width) in elk_alloc_reg_set()
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| D | elk_vec4_builder.h | 151 dispatch_width() const in dispatch_width() function
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| D | elk_shader.cpp | 1377 const unsigned dispatch_width = devinfo->ver >= 20 ? 16 : 8; in elk_compile_tes() local
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| D | elk_ir_performance.cpp | 1615 unsigned dispatch_width) in calculate_performance()
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| D | elk_fs_generator.cpp | 1625 elk_fs_generator::generate_code(const elk_cfg_t *cfg, int dispatch_width, in generate_code()
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| D | elk_vec4.cpp | 2652 const unsigned dispatch_width = compiler->devinfo->ver >= 20 ? 16 : 8; in elk_compile_vs() local
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| D | elk_fs.cpp | 7851 elk_nir_lower_simd(nir_shader *nir, unsigned dispatch_width) in elk_nir_lower_simd()
7892 const unsigned dispatch_width = 8u << simd; in elk_compile_cs() local
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| D | elk_compiler.h | 1241 unsigned dispatch_width) in elk_cs_prog_data_prog_offset()
1525 uint32_t dispatch_width; /**< 0 for vec4 */ member
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| /external/igt-gpu-tools/assembler/ |
| D | brw_eu_emit.c | 2132 int dispatch_width, in brw_fb_WRITE()
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| /external/mesa3d/src/gallium/drivers/iris/ |
| D | iris_context.h | 382 unsigned dispatch_width) in iris_cs_data_prog_offset()
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