1 /* 2 * Copyright © 2023 Valve Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 #ifndef RADV_NIR_H 25 #define RADV_NIR_H 26 27 #include <stdbool.h> 28 #include <stdint.h> 29 #include "amd_family.h" 30 #include "nir.h" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 typedef struct nir_shader nir_shader; 37 struct radeon_info; 38 struct radv_pipeline_layout; 39 struct radv_shader_stage; 40 struct radv_shader_info; 41 struct radv_shader_args; 42 struct radv_shader_layout; 43 struct radv_device; 44 struct radv_graphics_state_key; 45 46 void radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device, 47 const struct radv_shader_stage *stage); 48 49 void radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, const struct radv_shader_stage *stage, 50 const struct radv_graphics_state_key *gfx_state, uint32_t address32_hi); 51 52 bool radv_nir_lower_hit_attrib_derefs(nir_shader *shader); 53 54 bool radv_nir_lower_ray_payload_derefs(nir_shader *shader, uint32_t offset); 55 56 bool radv_nir_lower_ray_queries(nir_shader *shader, struct radv_device *device); 57 58 bool radv_nir_lower_vs_inputs(nir_shader *shader, const struct radv_shader_stage *vs_stage, 59 const struct radv_graphics_state_key *gfx_state, const struct radeon_info *rad_info); 60 61 bool radv_nir_lower_primitive_shading_rate(nir_shader *nir, enum amd_gfx_level gfx_level); 62 63 bool radv_nir_lower_fs_intrinsics(nir_shader *nir, const struct radv_shader_stage *fs_stage, 64 const struct radv_graphics_state_key *gfx_state); 65 66 bool radv_nir_lower_fs_barycentric(nir_shader *shader, const struct radv_graphics_state_key *gfx_state, 67 unsigned rast_prim); 68 69 bool radv_nir_lower_intrinsics_early(nir_shader *nir, bool lower_view_index_to_zero); 70 71 bool radv_nir_lower_view_index(nir_shader *nir, bool per_primitive); 72 73 bool radv_nir_lower_viewport_to_zero(nir_shader *nir); 74 75 bool radv_nir_export_multiview(nir_shader *nir); 76 77 void radv_nir_lower_io_to_scalar_early(nir_shader *nir, nir_variable_mode mask); 78 79 void radv_nir_lower_io(struct radv_device *device, nir_shader *nir); 80 81 bool radv_nir_lower_io_to_mem(struct radv_device *device, struct radv_shader_stage *stage); 82 83 void radv_nir_lower_poly_line_smooth(nir_shader *nir, const struct radv_graphics_state_key *gfx_state); 84 85 bool radv_nir_lower_cooperative_matrix(nir_shader *shader, unsigned wave_size); 86 87 #ifdef __cplusplus 88 } 89 #endif 90 91 #endif /* RADV_NIR_H */ 92