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Searched refs:AMD_IP_COMPUTE (Results 1 – 21 of 21) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_query.h39 return ip_type == AMD_IP_COMPUTE ? compute_tdr_duration_ns : other_tdr_duration_ns; in radv_get_tdr_timeout_for_ip()
Dradv_dgc.c65 return MAX2(pdev->info.ip[AMD_IP_GFX].ib_alignment, pdev->info.ip[AMD_IP_COMPUTE].ib_alignment); in radv_dgc_get_buffer_alignment()
472 layout->ace_preamble_size = radv_dgc_preamble_cmdbuf_size(device, AMD_IP_COMPUTE); in get_dgc_cmdbuf_layout()
478 …f(device, (layout->ace_cmd_stride * sequences_count) + PKT3_INDIRECT_BUFFER_BYTES, AMD_IP_COMPUTE); in get_dgc_cmdbuf_layout()
497 offset = radv_align_cmdbuf(device, offset, AMD_IP_COMPUTE); in get_dgc_cmdbuf_layout()
501 offset += radv_dgc_trailer_cmdbuf_size(device, AMD_IP_COMPUTE); in get_dgc_cmdbuf_layout()
502 offset = radv_align_cmdbuf(device, offset, AMD_IP_COMPUTE); in get_dgc_cmdbuf_layout()
508 offset = radv_align_cmdbuf(device, offset, AMD_IP_COMPUTE); in get_dgc_cmdbuf_layout()
589 return radv_get_indirect_cmdbuf_size(pGeneratedCommandsInfo, AMD_IP_COMPUTE); in radv_get_indirect_ace_cmdbuf_size()
595 return radv_get_indirect_cmdbuf_offset(pGeneratedCommandsInfo, AMD_IP_COMPUTE); in radv_get_indirect_ace_cmdbuf_offset()
601 return radv_get_indirect_trailer_offset(pGeneratedCommandsInfo, AMD_IP_COMPUTE); in radv_get_indirect_ace_trailer_offset()
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Dradv_physical_device.c288 …if (pdev->info.ip[AMD_IP_COMPUTE].num_queues > 0 && !(instance->debug_flags & RADV_DEBUG_NO_COMPUT… in radv_physical_device_init_queue_table()
2370 …if (pdev->info.ip[AMD_IP_COMPUTE].num_queues > 0 && !(instance->debug_flags & RADV_DEBUG_NO_COMPUT… in radv_get_physical_device_queue_family_properties()
2413 …if (pdev->info.ip[AMD_IP_COMPUTE].num_queues > 0 && !(instance->debug_flags & RADV_DEBUG_NO_COMPUT… in radv_get_physical_device_queue_family_properties()
2420 .queueCount = pdev->info.ip[AMD_IP_COMPUTE].num_queues, in radv_get_physical_device_queue_family_properties()
Dradv_queue.c1402 struct radeon_cmdbuf *ace_pre_cs = ws->cs_create(ws, AMD_IP_COMPUTE, false); in radv_create_gang_wait_preambles_postambles()
1403 struct radeon_cmdbuf *ace_post_cs = ws->cs_create(ws, AMD_IP_COMPUTE, false); in radv_create_gang_wait_preambles_postambles()
2089 return AMD_IP_COMPUTE; in radv_queue_family_to_ring()
Dradv_sqtt.c43 case AMD_IP_COMPUTE: in radv_ip_to_queue_family()
Dradv_rmv.c933 case AMD_IP_COMPUTE: in radv_rmv_log_submit()
Dradv_query.c2075 return radv_get_tdr_timeout_for_ip(AMD_IP_COMPUTE) * 2; in radv_get_rel_timeout_for_query()
Dradv_cmd_buffer.c794 …device->ws->cs_create(device->ws, AMD_IP_COMPUTE, cmd_buffer->vk.level == VK_COMMAND_BUFFER_LEVEL_… in radv_gang_init()
885 case AMD_IP_COMPUTE: in radv_save_pipeline()
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_userq.c68 case AMD_IP_COMPUTE: in amdgpu_userq_deinit()
121 case AMD_IP_COMPUTE: in amdgpu_userq_init()
Damdgpu_cs.cpp548 acs->ip_type == AMD_IP_COMPUTE || in amdgpu_cs_has_user_fence()
711 cs->ip_type == AMD_IP_COMPUTE || in amdgpu_ib_new_buffer()
825 if (ip_type == AMD_IP_GFX || ip_type == AMD_IP_COMPUTE) { in amdgpu_init_cs_context()
940 (ip_type == AMD_IP_GFX || ip_type == AMD_IP_COMPUTE); in amdgpu_cs_create()
1398 if (userq->ip_type == AMD_IP_GFX || userq->ip_type == AMD_IP_COMPUTE) { in amdgpu_cs_add_userq_packets()
2074 case AMD_IP_COMPUTE: in amdgpu_cs_flush()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_winsys.c61 …ws->info.ip[AMD_IP_COMPUTE].num_queues = MIN2(ws->info.ip[AMD_IP_COMPUTE].num_queues, MAX_RINGS_PE… in do_winsys_init()
Dradv_amdgpu_cs.c121 return ws->use_ib_bos && (ip_type == AMD_IP_GFX || ip_type == AMD_IP_COMPUTE); in ring_can_use_ib_bos()
427 if (ip_type == AMD_IP_GFX || ip_type == AMD_IP_COMPUTE) { in radv_amdgpu_winsys_cs_pad()
/external/mesa3d/src/amd/common/
Damd_family.c205 case AMD_IP_COMPUTE: in ac_get_ip_type_string()
Damd_family.h161 AMD_IP_COMPUTE, enumerator
Dac_gpu_info.c556 STATIC_ASSERT(AMDGPU_HW_IP_COMPUTE == AMD_IP_COMPUTE); in ac_query_gpu_info()
624 info->ip[AMD_IP_GFX].ver_minor = info->ip[AMD_IP_COMPUTE].ver_minor = 1; in ac_query_gpu_info()
630 info->ip[AMD_IP_GFX].ver_minor = info->ip[AMD_IP_COMPUTE].ver_minor = 3; in ac_query_gpu_info()
650 info->ip[AMD_IP_COMPUTE].ib_pad_dw_mask = 0x7; in ac_query_gpu_info()
661 if (!info->ip[AMD_IP_GFX].num_queues && !info->ip[AMD_IP_COMPUTE].num_queues) { in ac_query_gpu_info()
857 else if (info->ip[AMD_IP_GFX].ver_major == 9 || info->ip[AMD_IP_COMPUTE].ver_major == 9) in ac_query_gpu_info()
1608 info->max_submitted_ibs[AMD_IP_COMPUTE] = 124; in ac_query_gpu_info()
Dac_parse_ib.c2063 if (ib->ip_type == AMD_IP_GFX || ib->ip_type == AMD_IP_COMPUTE) in ac_parse_ib_chunk()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_sqtt.c56 const bool is_compute_queue = ip_type == AMD_IP_COMPUTE; in si_emit_sqtt_start()
77 const bool is_compute_queue = ip_type == AMD_IP_COMPUTE; in si_emit_sqtt_stop()
124 case AMD_IP_COMPUTE: in si_sqtt_start()
179 case AMD_IP_COMPUTE: in si_sqtt_stop()
Dsi_debug.c26 return sctx->has_graphics ? AMD_IP_GFX : AMD_IP_COMPUTE; in si_get_context_ip_type()
1098 case AMD_IP_COMPUTE: { in si_check_vm_faults()
Dsi_pipe.c576 if (!ws->cs_create(&sctx->gfx_cs, sctx->ctx, sctx->has_graphics ? AMD_IP_GFX : AMD_IP_COMPUTE, in si_create_context()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_cs.c690 case AMD_IP_COMPUTE: in radeon_drm_cs_flush()
703 if (cs->ip_type == AMD_IP_COMPUTE) { in radeon_drm_cs_flush()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_pipe_common.c1298 printf("ip[AMD_IP_COMPUTE] = %u\n", rscreen->info.ip[AMD_IP_COMPUTE].num_queues); in r600_common_screen_init()