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Searched refs:inw (Results 1 – 25 of 30) sorted by relevance

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/external/grub/netboot/
Dlance.c218 (void)inw(ioaddr+LANCE_RESET); in lance_reset()
228 outw(inw(ioaddr+LANCE_BUS_IF) | 0x2, ioaddr+LANCE_BUS_IF); in lance_reset()
238 media = inw(ioaddr+0x16) ; in lance_reset()
252 check = inw(ioaddr+0x16) ; in lance_reset()
275 (void)inw(ioaddr+LANCE_ADDR); in lance_reset()
278 (void)inw(ioaddr+LANCE_ADDR); in lance_reset()
281 (void)inw(ioaddr+LANCE_ADDR); in lance_reset()
284 (void)inw(ioaddr+LANCE_ADDR); in lance_reset()
288 if (inw(ioaddr+LANCE_DATA) & 0x100) in lance_reset()
312 inw(ioaddr+LANCE_DATA)); in lance_poll()
[all …]
Dsmc9000.c117 bank = inw(ioaddr + BANK_SELECT); in smc_probe()
124 bank = inw(ioaddr + BANK_SELECT); in smc_probe()
133 base_address_register = inw(ioaddr + BASE); in smc_probe()
151 revision_register = inw(ioaddr + REVISION); in smc_probe()
290 packet_no = inw(smc9000_base + FIFO_PORTS); in smc9000_transmit()
299 tx_status = inw( smc9000_base + DATA_1 ); in smc9000_transmit()
307 _outw(inw(smc9000_base + TCR ) | TCR_ENABLE, smc9000_base + TCR ); in smc9000_transmit()
332 if (inw(smc9000_base + FIFO_PORTS) & FP_RXEMPTY) in smc9000_poll()
339 if (!(inw(smc9000_base + DATA_1) & RS_ERRORS)) { in smc9000_poll()
341 nic->packetlen = (inw(smc9000_base + DATA_1) & 0x07ff); in smc9000_poll()
[all …]
D3c90x.c269 while (inw(ioaddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); in a3c90x_internal_IssueCommand()
303 while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); in a3c90x_internal_ReadEeprom()
307 while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); in a3c90x_internal_ReadEeprom()
308 val = inw(ioaddr + regEepromData_0_w); in a3c90x_internal_ReadEeprom()
326 while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); in a3c90x_internal_WriteEepromWord()
330 while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); in a3c90x_internal_WriteEepromWord()
334 while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); in a3c90x_internal_WriteEepromWord()
339 while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); in a3c90x_internal_WriteEepromWord()
343 while((1<<15) & inw(ioaddr + regEepromCommand_0_w)); in a3c90x_internal_WriteEepromWord()
412 while (inw(INF_3C90X.IOAddr + regCommandIntStatus_w) & INT_CMDINPROGRESS); in a3c90x_reset()
[all …]
D3c509.c74 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS) in t509_reset()
89 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS) in t509_reset()
193 while (inw(BASE + EP_W1_FREE_TX) < (unsigned short)len + pad + 4) in t509_transmit()
211 while((inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS) != 0) in t509_transmit()
226 cst=inw(BASE + EP_STATUS); in t509_poll()
241 status = inw(BASE + EP_W1_RX_STATUS); in t509_poll()
265 status = inw(BASE + EP_W1_RX_STATUS); in t509_poll()
289 while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS) in t509_poll()
332 return (inw(IS_BASE + EP_W0_EEPROM_DATA)); in get_e()
370 data = (data << 1) | (inw(id_port) & 1); in get_eeprom_data()
[all …]
D3c595.c202 while (inw(BASE + VX_W1_FREE_TX) < len + pad + 4) { in t595_transmit()
221 while((inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS) != 0) in t595_transmit()
236 cst=inw(BASE + VX_STATUS); in t595_poll()
251 status = inw(BASE + VX_W1_RX_STATUS); in t595_poll()
275 status = inw(BASE + VX_W1_RX_STATUS); in t595_poll()
301 while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS); in t595_poll()
346 return (inw(BASE + VX_W0_EEPROM_DATA));
355 vx_connectors = inw(BASE + VX_W3_RESET_OPT) & 0x7f; in vxgetlink()
Dsmc9000.h199 #define SMC_DELAY(x) { inw( x + RCR );\
200 inw( x + RCR );\
201 inw( x + RCR ); }
Dcs89x0.c86 return inw(eth_nic_base + DATA_PORT); in readreg()
424 status = inw(eth_nic_base + RX_FRAME_PORT); in cs89x0_poll()
425 nic->packetlen = inw(eth_nic_base + RX_FRAME_PORT); in cs89x0_poll()
428 nic->packet[nic->packetlen-1] = inw(eth_nic_base + RX_FRAME_PORT); in cs89x0_poll()
466 if ((inw(ioaddr + ADD_PORT) & ADD_MASK) != ADD_SIG) in cs89x0_probe()
471 if (inw(ioaddr + DATA_PORT) != CHIP_EISA_ID_SIG) in cs89x0_probe()
Deepro.c356 rcv_event = inw(ioaddr + IO_PORT); in eepro_poll()
359 rcv_status = inw(ioaddr + IO_PORT); in eepro_poll()
360 rcv_next_frame = inw(ioaddr + IO_PORT); in eepro_poll()
361 rcv_size = inw(ioaddr + IO_PORT); in eepro_poll()
425 status = inw(ioaddr + IO_PORT); in eepro_transmit()
435 if (((status = inw(ioaddr + IO_PORT)) & TX_DONE_BIT) == 0) { in eepro_transmit()
Deepro100.c334 retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0); in do_eeprom_cmd()
385 status = inw(ioaddr + SCBStatus); in eepro100_transmit()
391 t, s, status, inw (ioaddr + SCBCmd)); in eepro100_transmit()
420 s1 = inw (ioaddr + SCBStatus); in eepro100_transmit()
424 s2 = inw (ioaddr + SCBStatus); in eepro100_transmit()
D3c595.h296 #define VX_BUSY_WAIT while (inw(BASE + VX_STATUS) & S_COMMAND_IN_PROGRESS)
425 #define is_eeprom_busy(b) (inw((b)+VX_W0_EEPROM_COMMAND)&EEPROM_BUSY)
Dtiara.c145 len = inw(ioaddr + BMPR_MEM_PORT); /* throw away status */ in tiara_poll()
146 len = inw(ioaddr + BMPR_MEM_PORT); in tiara_poll()
Drtl8139.c213 fullduplex = inw(ioaddr + MII_BMCR) & BMCRDuplex; in rtl8139_probe()
364 status = inw(ioaddr + IntrStatus); in rtl_transmit()
399 status = inw(ioaddr + IntrStatus); in rtl_poll()
Ddepca.c521 for (i = 0; i < 100 && !(inw(DEPCA_DATA) & IDON); i++) in InitRestartDepca()
545 if (inw(DEPCA_DATA) != STOP) in depca_reset()
693 if (inw(DEPCA_DATA) != STOP) in depca_probe1()
Depic100.c180 *ap++ = inw(lan0 + i*4); in epic100_probe()
480 return inw(mmdata); in mii_read()
D3c509.h75 #define is_eeprom_busy(b) (inw((b)+EP_W0_EEPROM_COMMAND)&EEPROM_BUSY)
Dvia-rhine.c769 ReturnMII = inw (wMIIDATA); in ReadMII()
809 ReadMIItmp = inw (wMIIDATA); in WriteMII()
1089 CRbak = inw (byCR0); in rhine_reset()
Dlinux-asm-io.h152 #define inw(port) \ macro
Dtlan.c341 return (inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2))); in TLan_DioRead16()
2031 device_id = inw(ioaddr + EISA_ID2);
2165 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID));
2166 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2));
2173 if (inw(ioaddr + EISA_ID) != 0x110E) {
2178 device_id = inw(ioaddr + EISA_ID2);
2565 host_int = inw( dev->base_addr + TLAN_HOST_INT );
/external/openssl/crypto/evp/
De_xcbc_d.c77 DES_cblock inw; member
109 memcpy(&data(ctx)->inw[0],&key[8],8); in desx_cbc_init_key()
120 &data(ctx)->inw, in desx_cbc_cipher()
/external/openssl/crypto/des/
Dxcbc_enc.c114 DES_cblock *ivec, const_DES_cblock *inw, in DES_xcbc_encrypt() argument
125 in2 = &(*inw)[0]; in DES_xcbc_encrypt()
Ddes_old.h156 #define des_xcbc_encrypt(i,o,l,k,iv,inw,outw,e)\ argument
157 DES_xcbc_encrypt((i),(o),(l),&(k),(iv),(inw),(outw),(e))
259 #define des_xcbc_encrypt(i,o,l,k,iv,inw,outw,e)\ argument
260 _ossl_old_des_xcbc_encrypt((i),(o),(l),(k),(iv),(inw),(outw),(e))
347 _ossl_old_des_cblock *inw,_ossl_old_des_cblock *outw,int enc);
Ddes_old.c111 _ossl_old_des_cblock *inw,_ossl_old_des_cblock *outw,int enc) in _ossl_old_des_xcbc_encrypt() argument
114 length, (DES_key_schedule *)schedule, ivec, inw, outw, enc); in _ossl_old_des_xcbc_encrypt()
Ddes.h146 const_DES_cblock *inw,const_DES_cblock *outw,int enc);
/external/openssl/include/openssl/
Ddes_old.h156 #define des_xcbc_encrypt(i,o,l,k,iv,inw,outw,e)\ argument
157 DES_xcbc_encrypt((i),(o),(l),&(k),(iv),(inw),(outw),(e))
259 #define des_xcbc_encrypt(i,o,l,k,iv,inw,outw,e)\ argument
260 _ossl_old_des_xcbc_encrypt((i),(o),(l),(k),(iv),(inw),(outw),(e))
347 _ossl_old_des_cblock *inw,_ossl_old_des_cblock *outw,int enc);
Ddes.h146 const_DES_cblock *inw,const_DES_cblock *outw,int enc);

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