| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 51 MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19, enumerator
137 (form >= X86Local::MRM0r && form <= X86Local::MRM7r) || in needsModRMForDecode()
153 (form >= X86Local::MRM0r && form <= X86Local::MRM7r)) in isRegFormat()
689 case X86Local::MRM0r: in emitInstructionSpecifier()
781 case X86Local::MRM0r: in emitDecodePath()
789 filter = new ExtendedFilter(true, Form - X86Local::MRM0r); in emitDecodePath()
868 case X86Local::MRM0r: in emitDecodePath()
876 filter = new ExtendedFilter(true, Form - X86Local::MRM0r); in emitDecodePath()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrShiftRotate.td | 417 def ROL8rCL : I<0xD2, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1),
420 def ROL16rCL : I<0xD3, MRM0r, (outs GR16:$dst), (ins GR16:$src1),
423 def ROL32rCL : I<0xD3, MRM0r, (outs GR32:$dst), (ins GR32:$src1),
426 def ROL64rCL : RI<0xD3, MRM0r, (outs GR64:$dst), (ins GR64:$src1),
431 def ROL8ri : Ii8<0xC0, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2),
434 def ROL16ri : Ii8<0xC1, MRM0r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2),
438 def ROL32ri : Ii8<0xC1, MRM0r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2),
441 def ROL64ri : RIi8<0xC1, MRM0r, (outs GR64:$dst),
447 def ROL8r1 : I<0xD0, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1),
450 def ROL16r1 : I<0xD1, MRM0r, (outs GR16:$dst), (ins GR16:$src1),
[all …]
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| D | X86InstrInfo.h | 295 MRM0r = 16, MRM1r = 17, MRM2r = 18, MRM3r = 19, // Format /0 /1 /2 /3 enumerator
566 case X86II::MRM0r: case X86II::MRM1r: in getMemoryOperandNo()
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| D | X86InstrArithmetic.td | 383 def INC8r : I<0xFE, MRM0r, (outs GR8 :$dst), (ins GR8 :$src1),
396 def INC64r : RI<0xFF, MRM0r, (outs GR64:$dst), (ins GR64:$src1), "inc{q}\t$dst",
404 def INC64_16r : I<0xFF, MRM0r, (outs GR16:$dst), (ins GR16:$src1),
408 def INC64_32r : I<0xFF, MRM0r, (outs GR32:$dst), (ins GR32:$src1),
1073 defm ADD : ArithBinOp_RF<0x00, 0x02, 0x04, "add", MRM0r, MRM0m,
1110 def TEST8ri : BinOpRI_F<0xF6, "test", Xi8 , X86testpat, MRM0r>;
1111 def TEST16ri : BinOpRI_F<0xF6, "test", Xi16, X86testpat, MRM0r>;
1112 def TEST32ri : BinOpRI_F<0xF6, "test", Xi32, X86testpat, MRM0r>;
1113 def TEST64ri32 : BinOpRI_F<0xF6, "test", Xi64, X86testpat, MRM0r>;
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| D | X86InstrCMovSetCC.td | 79 def r : I<opc, MRM0r, (outs GR8:$dst), (ins),
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| D | X86InstrSystem.td | 346 def SLDT16r : I<0x00, MRM0r, (outs GR16:$dst), (ins),
350 def SLDT32r : I<0x00, MRM0r, (outs GR32:$dst), (ins),
355 def SLDT64r : RI<0x00, MRM0r, (outs GR64:$dst), (ins),
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| D | X86MCCodeEmitter.cpp | 932 case X86II::MRM0r: case X86II::MRM1r: in EncodeInstruction()
940 (TSFlags & X86II::FormMask)-X86II::MRM0r, in EncodeInstruction()
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| D | X86CodeEmitter.cpp | 886 case X86II::MRM0r: case X86II::MRM1r: in emitInstruction()
892 (Desc->TSFlags & X86II::FormMask)-X86II::MRM0r); in emitInstruction()
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| D | X86InstrInfo.td | 631 def POP16rmr: I<0x8F, MRM0r, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
635 def POP32rmr: I<0x8F, MRM0r, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>;
672 def POP64rmr: I<0x8F, MRM0r, (outs GR64:$reg), (ins), "pop{q}\t$reg", []>;
823 def MOV64ri32 : RIi32<0xC7, MRM0r, (outs GR64:$dst), (ins i64i32imm:$src),
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| D | X86InstrFormats.td | 25 def MRM0r : Format<16>; def MRM1r : Format<17>; def MRM2r : Format<18>;
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| /external/llvm/test/TableGen/ |
| D | TargetInstrInfo.td | 52 def MRM0r : Format<16>; def MRM1r : Format<17>; def MRM2r : Format<18>;
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