| /external/llvm/lib/Target/X86/ |
| D | X86InstrShiftRotate.td | 20 def SHL8rCL : I<0xD2, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1),
23 def SHL16rCL : I<0xD3, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
26 def SHL32rCL : I<0xD3, MRM4r, (outs GR32:$dst), (ins GR32:$src1),
29 def SHL64rCL : RI<0xD3, MRM4r, (outs GR64:$dst), (ins GR64:$src1),
34 def SHL8ri : Ii8<0xC0, MRM4r, (outs GR8 :$dst), (ins GR8 :$src1, i8imm:$src2),
39 def SHL16ri : Ii8<0xC1, MRM4r, (outs GR16:$dst), (ins GR16:$src1, i8imm:$src2),
42 def SHL32ri : Ii8<0xC1, MRM4r, (outs GR32:$dst), (ins GR32:$src1, i8imm:$src2),
45 def SHL64ri : RIi8<0xC1, MRM4r, (outs GR64:$dst),
52 def SHL8r1 : I<0xD0, MRM4r, (outs GR8:$dst), (ins GR8:$src1),
54 def SHL16r1 : I<0xD1, MRM4r, (outs GR16:$dst), (ins GR16:$src1),
[all …]
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| D | X86InstrControl.td | 101 def JMP32r : I<0xFF, MRM4r, (outs), (ins GR32:$dst), "jmp{l}\t{*}$dst",
106 def JMP64r : I<0xFF, MRM4r, (outs), (ins GR64:$dst), "jmp{q}\t{*}$dst",
199 def TAILJMPr : I<0xFF, MRM4r, (outs), (ins GR32_TC:$dst, variable_ops),
298 def TAILJMPr64 : I<0xFF, MRM4r, (outs), (ins ptr_rc_tailcall:$dst, variable_ops),
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| D | X86InstrInfo.h | 296 MRM4r = 20, MRM5r = 21, MRM6r = 22, MRM7r = 23, // Format /4 /5 /6 /7 enumerator
568 case X86II::MRM4r: case X86II::MRM5r: in getMemoryOperandNo()
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| D | X86InstrSystem.td | 326 def VERRr : I<0x00, MRM4r, (outs), (ins GR16:$seg),
379 def SMSW16r : I<0x01, MRM4r, (outs GR16:$dst), (ins),
381 def SMSW32r : I<0x01, MRM4r, (outs GR32:$dst), (ins),
384 def SMSW64r : RI<0x01, MRM4r, (outs GR64:$dst), (ins),
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| D | X86InstrMMX.td | 305 defm MMX_PSRAW : MMXI_binop_rmi_int<0xE1, 0x71, MRM4r, "psraw",
307 defm MMX_PSRAD : MMXI_binop_rmi_int<0xE2, 0x72, MRM4r, "psrad",
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| D | X86InstrArithmetic.td | 49 def MUL8r : I<0xF6, MRM4r, (outs), (ins GR8:$src), "mul{b}\t$src",
57 def MUL16r : I<0xF7, MRM4r, (outs), (ins GR16:$src),
62 def MUL32r : I<0xF7, MRM4r, (outs), (ins GR32:$src),
66 def MUL64r : RI<0xF7, MRM4r, (outs), (ins GR64:$src),
1067 defm AND : ArithBinOp_RF<0x20, 0x22, 0x24, "and", MRM4r, MRM4m,
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| D | X86MCCodeEmitter.cpp | 934 case X86II::MRM4r: case X86II::MRM5r: in EncodeInstruction()
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| D | X86CodeEmitter.cpp | 888 case X86II::MRM4r: case X86II::MRM5r: in emitInstruction()
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| D | X86InstrFormats.td | 26 def MRM3r : Format<19>; def MRM4r : Format<20>; def MRM5r : Format<21>;
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| D | X86InstrInfo.td | 982 def BT16ri8 : Ii8<0xBA, MRM4r, (outs), (ins GR16:$src1, i16i8imm:$src2),
986 def BT32ri8 : Ii8<0xBA, MRM4r, (outs), (ins GR32:$src1, i32i8imm:$src2),
989 def BT64ri8 : RIi8<0xBA, MRM4r, (outs), (ins GR64:$src1, i64i8imm:$src2),
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| D | X86InstrSSE.td | 2400 defm VPSRAW : PDI_binop_rmi_int<0xE1, 0x71, MRM4r, "vpsraw",
2403 defm VPSRAD : PDI_binop_rmi_int<0xE2, 0x72, MRM4r, "vpsrad",
2454 defm PSRAW : PDI_binop_rmi_int<0xE1, 0x71, MRM4r, "psraw",
2456 defm PSRAD : PDI_binop_rmi_int<0xE2, 0x72, MRM4r, "psrad",
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| /external/llvm/test/TableGen/ |
| D | TargetInstrInfo.td | 53 def MRM3r : Format<19>; def MRM4r : Format<20>; def MRM5r : Format<21>;
109 "shl $dst, CL", 0xD2, MRM4r,
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.cpp | 52 MRM4r = 20, MRM5r = 21, MRM6r = 22, MRM7r = 23, enumerator
693 case X86Local::MRM4r: in emitInstructionSpecifier()
785 case X86Local::MRM4r: in emitDecodePath()
872 case X86Local::MRM4r: in emitDecodePath()
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